Senior NPI Test Engineer - Analog/Mixed-Signal ICs

Elevatesemi; San Diego (CA); On-site; USD 106,250 - 166,750; Full time

Benefits offered by this job

100% Employer Paid Health Insurance (M

Unlimited Paid Time Off

Performance Bonuses

Relocation Assistance

Conference Attendance Support

Tuition Reimbursement

Retirement Plans

Sabbatical Program

Volunteer Days

Biweekly Phone Stipend

Employee Assistance Program

Job summary

Elevate Semiconductor in San Diego, CA, is seeking a Senior Test Engineer to lead NPI for precision analog and mixed-signal ICs used in memory, AI, computing and automated test equipment (ATE).

You will own the production test strategy from first silicon through high-volume manufacturing and collaborate with Design, Product Engineering, Applications, Quality, Operations, and external manufacturing partners to deliver robust, cost-effective production solutions.

Qualifications

• Bachelor’s degree in Electrical Engineering or related field.
• 6+ years of experience in semiconductor test engineering, ideally with analog or mixed signal ICs.
• Experience with Teradyne UltraFlex and/or Verigy SmartScale or PinScale platforms.
• Understanding of analog testing principles and methodologies.
• Experience with vector translation tools such as Velocity or Test Insight.
• Familiarity with scan testing, JTAG, memory BIST, and loopback techniques.
• Strong troubleshooting skills and attention to detail.
• Strong communication skills and ability to collaborate across teams.

Responsibilities

• Lead NPI activities from first silicon through production release for precision analog and mixed-signal IC products.
• Develop complete production test solutions for wafer sort and final test using Teradyne UltraFlex IGXL and associated handlers/probers.
• Correlate bench measurements with ATE results and establish production test limits using statistical analysis and characterization data.
• Develop and optimize production test programs for precision DACs, current source/sink products, PMICs, analog interface ICs.
• Design, debug, and validate load boards, probe cards, sockets, and production hardware in collaboration with external vendors.
• Drive multisite optimization, parallel testing, throughput improvement, and overall manufacturing cost reduction.
• Perform silicon debug and root‑cause analysis for design, process, package, and test related issues.
• Work closely with IC Design during schematic reviews, silicon bring‑up, and Design‑for‑Test (DFT) planning.
• Support qualification, reliability, HTOL, characterization, and customer qualification activities.
• Develop production release documentation including correlation reports, GR&R studies, guard‑banding analysis, and manufacturing specifications.
• Transfer products into OSAT and high‑volume manufacturing while providing engineering support during production ramp.
• Develop automation tools using Python, JMP, and data analytics to improve engineering productivity and manufacturing quality.

Skills

Teradyne UltraFlex

Verigy SmartScale

PinScale

Analog testing principles

Velocity

Test Insight

JTAG

Memory BIST

Root cause analysis

Team collaboration

Python

JMP

Data analytics

Education

Bachelor’s degree in Electrical Engineering

Tools

Teradyne UltraFlex

Verigy SmartScale

PinScale

Python

JMP

Velocity

Test Insight

Job description

Elevate Semiconductor in San Diego, CA, is seeking a Senior Test Engineer to lead NPI for precision analog and mixed-signal ICs used in memory, AI, computing and automated test equipment (ATE).

You will own the production test strategy from first silicon through high-volume manufacturing and collaborate with Design, Product Engineering, Applications, Quality, Operations, and external manufacturing partners to deliver robust, cost-effective production solutions.