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Cirrus Logic is seeking a layout engineer to complete the layout and verification of high-performance mixed-signal CMOS ICs using Cadence Virtuoso XL and Mentor Calibre tools. You will collaborate with circuit engineers to generate topological layouts for optimal circuit performance.
The role requires designing analog/mixed-signal layouts, understanding device matching, and applying robust routing at block and top levels, with strong communication and planning skills.
Cirrus Logic is seeking a layout engineer to complete the layout and verification of high-performance mixed-signal CMOS ICs using Cadence Virtuoso XL and Mentor Calibre tools. You will collaborate with circuit engineers to generate topological layouts for optimal circuit performance.
The role requires designing analog/mixed-signal layouts, understanding device matching, and applying robust routing at block and top levels, with strong communication and planning skills.