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Job summary
Cirrus Logic is seeking an experienced IC layout engineer to work with design engineers on layout and verification of high-performance mixed-signal CMOS ICs using Cadence Virtuoso XL and Mentor Calibre tools. The role requires an Associate's Degree in Electronic/IC layout CAD; 10+ years of IC layout experience; ability to layout analog circuitry, understand matching, ESD, and LVS troubleshooting; strong collaboration skills.
Qualifications
Associates degree and 10+ years IC layout experience.
Ability to layout analog circuitry in a size/time constrained environment.
Understand layout techniques such as common centroid, matching, isolation, shielding, and dummy devices.
Solid understanding of ESD, Latch-up, STI, WPE, electromigration, IR drop, cross-coupling, DFM, and Antenna effects.
Ability to solve design problems using technical skills, intuition, and creativity.
Proficiency in floor planning with block assembly and block-level routing.
LVS troubleshooting and debugging skills.
Proven track record of working in a fast-paced team environment.
Great teammate and ability to work with others.
Responsibilities
Solving layout design issues and applying proactive intervention
Proactively work with design engineers to achieve efficient circuit performance
Design analog & mixed-signal layouts
Understand device matching techniques
Understand signal conditioning/protection techniques
Strong collaboration skills, including written and verbal communication
Outstanding layout planning and integration skills
Experience in routing at the block level and chip top-level using assisted/automated tools
Skills
IC layout experience
Analog circuitry layout
Design tool proficiency
LVS troubleshooting
Communication skills
Education
Associates Degree in Electronic/IC layout CAD specialization
BS Degree in Electronics Engineering
Tools
Cadence Virtuoso XL
Mentor Calibre
Job description
Cirrus Logic is seeking an experienced IC layout engineer to work with design engineers on layout and verification of high-performance mixed-signal CMOS ICs using Cadence Virtuoso XL and Mentor Calibre tools. The role requires an Associate's Degree in Electronic/IC layout CAD; 10+ years of IC layout experience; ability to layout analog circuitry, understand matching, ESD, and LVS troubleshooting; strong collaboration skills.