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Cirrus Logic is seeking an experienced layout engineer to contribute to the layout and verification of high-performance analog and mixed-signal CMOS ICs. You will work closely with design engineers using Cadence Virtuoso XL and Mentor Calibre to generate topologies that optimize circuit performance.
The role emphasizes collaboration, precise layout planning, and the ability to translate circuit requirements into robust physical implementations in a fast-paced environment.
Cirrus Logic is seeking an experienced layout engineer to contribute to the layout and verification of high-performance analog and mixed-signal CMOS ICs. You will work closely with design engineers using Cadence Virtuoso XL and Mentor Calibre to generate topologies that optimize circuit performance.
The role emphasizes collaboration, precise layout planning, and the ability to translate circuit requirements into robust physical implementations in a fast-paced environment.