Senior MEMS Packaging Engineer

SiTime Corp.; Santa Clara (CA); On-site; USD 139,000 - 191,000; Full time

Benefits offered by this job

401k plan

Health and wellness (medical, dental,视

Equity grants

Quarterly bonus

Job summary

SiTime Corp. is seeking a Senior Semiconductor Package Engineer to specify, design, develop, and qualify custom packaging for MEMS-based timing products. Packaging options include QFN, WLCSP, ceramic, substrate-based, and multi-chip modules with MEMS and CMOS components.

This role involves leading design, development, and release-to-production activities. Qualified candidates have 5+ years in semiconductor IC packaging, experience with overseas OSATs, and strong knowledge of thermal, mechanical,

Qualifications

• 5+ years’ experience in semiconductor IC packaging technology and methodology.
• Experience managing overseas OSATs to bring products into production.
• Knowledge of leadframe-based, flip-chip, and substrate-based packages.
• Experience with flip-chip and bumping technologies.
• Understanding of thermal, stress, and electrical considerations in package design.
• Hands-on experience with CAD software (AutoCAD preferred but not required).
• The desire to work in a fast-paced, challenging, and risk-taking environment.

Responsibilities

• Develop new packaging technology for SiTime’s MEMS-based timing solutions
• Lead activities for package design, development, and release-to-production
• Develop, manage, and analyze DoEs running locally and overseas
• Manage development activities at OSATs
• Work with OSATs to prototype and test new custom package designs
• Ensure new technologies achieve required performance, reliability, and quality requirements
• Lead troubleshooting activities related to package design or performance

Skills

Semiconductor packaging

Overseas OSAT management

Thermal/stress/electrical modeling

CAD software

Team leadership

Education

MS or PhD in Mechanical Engineering or Materials Science

Tools

AutoCAD

Job description

SiTime Corp. is seeking a Senior Semiconductor Package Engineer to specify, design, develop, and qualify custom packaging for MEMS-based timing products. Packaging options include QFN, WLCSP, ceramic, substrate-based, and multi-chip modules with MEMS and CMOS components.

This role involves leading design, development, and release-to-production activities. Qualified candidates have 5+ years in semiconductor IC packaging, experience with overseas OSATs, and strong knowledge of thermal, mechanical,