Senior Memory Systems Engineer – Hybrid Bringup & Debug

Nvidia Corporation in; Santa Clara (CA); Hybrid; USD 186,000 - 311,000; Full time

Job summary

NVIDIA invites a Senior Memory Systems Engineer to own HBM and LPDDR integration across next-generation SoCs. You will tackle silicon bringup, validation, and memory training challenges with cross-functional teams, shaping product readiness from first silicon to scale.

Join a team delivering high-performance memory systems, device power and reliability targets, and cutting-edge AI workloads. The role blends silicon, packaging, firmware, and software for silicon-to-product execution in a hybrid

Qualifications

• BS or MS in EE/CE - or equivalent experience.
• 12+ years in HBM, LPDDR, or high-speed memory systems, with hands-on depth in silicon bringup, characterization, and debug at scale.
• PHY controller development experience is a significant plus and will set you apart.
• Deep command of SI/PI, timing, margining, and memory training behavior - and the multi-functional fluency to work across design, package, firmware, validation, and product teams without losing the thread.
• HBM PHY and controller architecture familiarity is useful context, but what this role actually demands is rarer: the system-level instinct to see where memory behavior is about to become a product problem - and the inventiveness to resolve it before it does.

Responsibilities

• Own HBM and LPDDR system integration and bringup across next-generation SoCs.
• Own memory performance, power management, thermal, and reliability closure across silicon, package, board, and firmware.
• Lead post-silicon margining, VF shmoo, eye, and correlation work across voltage, temperature, and frequency.
• Debug and resolve memory training, calibration, SI/PI, and system-level stability issues.
• Define validation, characterization, and issue-tracking plans across chip programs.

Skills

Memory systems

HBM/LPDDR

SI/PI

Silicon bringup

Characterization

Education

BS/MS in EE/CE

Job description

NVIDIA invites a Senior Memory Systems Engineer to own HBM and LPDDR integration across next-generation SoCs. You will tackle silicon bringup, validation, and memory training challenges with cross-functional teams, shaping product readiness from first silicon to scale.

Join a team delivering high-performance memory systems, device power and reliability targets, and cutting-edge AI workloads. The role blends silicon, packaging, firmware, and software for silicon-to-product execution in a hybrid