Senior Memory Systems Engineer: HBM/LPDDR Bringup

NVIDIA; California (MO); On-site; USD 196,000 - 311,000; Full time

Benefits offered by this job

Equity

Benefits

Job summary

NVIDIA is seeking a Senior Memory Systems Engineer to own HBM and LPDDR integration in next-generation SoCs. You will manage full-stack memory challenges across silicon, package, embedded software, testing, and product development.

You will drive system-level memory closure, margining, and calibration, coordinating with design, validation, and product teams to ensure performance, power, and reliability targets are met at scale.

Qualifications

• BS or MS in EE/CE or equivalent experience.
• 12+ years in HBM/LPDDR or high-speed memory systems with hands-on bringup and debugging at scale.
• Deep knowledge of SI/PI, timing, margining, and memory training behavior across teams.

Responsibilities

• Drive HBM and LPDDR integration and bringup for next-gen SoCs.
• Own memory performance, power, thermal, and reliability closure across silicon, package, board, and firmware.
• Lead post-silicon margining, VF shmoo, eye, and correlation work.
• Debug memory training, calibration, SI/PI, and stability issues.
• Define validation and characterization plans and issue-tracking framework.

Skills

HBM & LPDDR system integration

SI/PI expertise

Memory training & debugging

Silicon bringup experience

Cross-functional collaboration

Education

BS or MS in EE/CE

Tools

Characterization tools

Power management tooling

Job description

NVIDIA is seeking a Senior Memory Systems Engineer to own HBM and LPDDR integration in next-generation SoCs. You will manage full-stack memory challenges across silicon, package, embedded software, testing, and product development.

You will drive system-level memory closure, margining, and calibration, coordinating with design, validation, and product teams to ensure performance, power, and reliability targets are met at scale.