Senior Memory Architect: LPDRAM & DRAM Strategy

1000 Micron Technology, Inc.

San Jose (CA)

On-site

USD 171,000 - 238,000

Full time

14 days+
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Benefits offered by this job

Medical, dental and vision plans
Paid time off
Paid holidays
Retirement benefits

Job summary

Micron Technology, Inc. is seeking engineers to understand LPDRAM state machines and develop hardware models for DRAM features and the related validation test bench.

The role involves creating memory controller models with request scheduling and address mapping to enable new DRAM features, plus automation scripts in Python to improve simulation methodologies. Employer values include a Master's degree in Electronics/Electrical/Computer Engineering or Computer Science, with a strong background in

Qualifications

  • Master's degree required in Electronics Engineering, Electrical Engineering, Computer Engineering, Computer Science or related field.
  • Proficiency in C/C++ and Python; debugging interfaces like GDB and PDB.
  • Understanding LPDRAM technology and computer architecture.
  • Experience with memory controllers, cache policies, and simulation methodologies.

Responsibilities

  • Understand the LPDRAM state machine and develop hardware models for DRAM features and the validation test bench.
  • Develop memory controller models including request scheduling and address mapping for new DRAM features.
  • Develop automation tests using Python to improve simulation methodologies.
  • Design and conduct hardware or software tests to ensure quality and performance.

Skills

C/C++ or Python
GDB/PDB debugging
LPDRAM technology
Computer Architecture
Memory controller
Simulation methodologies

Education

Master's degree in Electronics Engineering / Electrical Engineering / Computer Engineering / Computer Science

Job description

Micron Technology, Inc. is seeking engineers to understand LPDRAM state machines and develop hardware models for DRAM features and the related validation test bench.

The role involves creating memory controller models with request scheduling and address mapping to enable new DRAM features, plus automation scripts in Python to improve simulation methodologies. Employer values include a Master's degree in Electronics/Electrical/Computer Engineering or Computer Science, with a strong background in

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