Senior Manufacturing Test Automation Engineer

Google Inc.

Sunnyvale (CA)

On-site

USD 144,000 - 208,000

Full time

14 days+
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Job summary

Google in Sunnyvale is seeking a Share Manufacturing Test Development Engineer to design and implement the manufacturing test processes for Google's hardware platforms. You will write test plans, develop automated scripts in Python for functional and system tests, and deploy test platforms across global manufacturing partners.

The role requires 8 years in hardware test development and 3 years with Python on Linux, plus strong collaboration with design and supply teams to ensure test coverage and

Qualifications

  • Bachelor's degree or equivalent practical experience in a technical field.
  • 8 years of hardware test development or validation in manufacturing environments.
  • 3 years creating automated test scripts and diagnostic tools using Python on Linux/Unix.

Responsibilities

  • Develop and write manufacturing test plans aligned with product specs.
  • Create automated test scripts and test executives for functional and system tests.
  • Build, deploy, and maintain test platforms for global manufacturing partners.
  • Analyze production yield issues and drive corrective actions with cross-functional teams.
  • Define end-to-end test strategies for new hardware products and mass production handoff.

Skills

Hardware test development
Python scripting
Test automation
Test solution design

Education

Bachelor's degree in a technical field or equivalent practical experience

Job description

Google in Sunnyvale is seeking a Share Manufacturing Test Development Engineer to design and implement the manufacturing test processes for Google's hardware platforms. You will write test plans, develop automated scripts in Python for functional and system tests, and deploy test platforms across global manufacturing partners.

The role requires 8 years in hardware test development and 3 years with Python on Linux, plus strong collaboration with design and supply teams to ensure test coverage and

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