Senior Manager, High-Speed Analog & LPDDR PHY Design

CareerArc; Santa Clara (CA); Hybrid; USD 170,000 - 250,000; Full time

Job summary

AMD seeks a candidate to lead the Memory I/O design team, focusing on LPDDR IPs, circuit architecture, calibration algorithms, and fast link performance modeling. You will drive design choices, coordinate across Analog Mixed-Signal, Digital, Firmware, and Verification teams, and mentor multiple IP projects to production.

The role requires strong analytical thinking, excellent communication, and a proven leadership track record in high-speed PHY development.

Qualifications

• Strong analytical thinking and inventive spirit with good risk awareness and mitigation.
• Excellent communication skills and a team-first mindset.
• Experience leading multiple IP designs from design to production.
• Proven track record in circuit-architecture and modeling for High Speed IOs.

Responsibilities

• Define circuit architecture and implement low power, area-efficient LPDDR PHY blocks.
• Collaborate with Analog Mixed-Signal, Digital, Firmware, and Verification teams for optimal PHY implementation.
• Coordinate execution and deliverables across customers and stakeholders.
• Develop models for link-level performance simulations and apply to design optimization.
• Document micro-architecture and algorithms; guide cross-functional teams on verification.
• Contribute to development flows that improve efficiency and quality of execution.

Skills

Team management

Analog/Mixed-Signal design

High-speed IOs

Circuit architecture

Communication skills

System-level modeling

RTL/FW debugging

Education

Bachelors/Masters/PhD in EE/CE

Tools

Verilog/AMS

Matlab/Simulink

Modeling tools

Job description

AMD seeks a candidate to lead the Memory I/O design team, focusing on LPDDR IPs, circuit architecture, calibration algorithms, and fast link performance modeling. You will drive design choices, coordinate across Analog Mixed-Signal, Digital, Firmware, and Verification teams, and mentor multiple IP projects to production.

The role requires strong analytical thinking, excellent communication, and a proven leadership track record in high-speed PHY development.