Senior Imaging Hardware Engineer High-Speed PCB & Sensors

Fairchild Imaging; San Jose (CA); On-site; USD 180,000 - 200,000; Full time

Benefits offered by this job

9/80 Schedule - every other Friday off

Medical, Dental and Vision coverage

Health Savings Account with employer"s

401(k) with employer matching

Tuition Reimbursement

Generous Paid Time Off

Job summary

Fairchild Imaging, headquartered in San Jose, California, seeks a Senior Hardware Design Engineer to lead the design of PCB-based imaging platforms for CMOS sensors, cameras, and X-ray systems. You will drive high-speed hardware development, SI, sensor integration, and cross-functional collaboration.

The role requires hands-on leadership, mentoring, and architecture decisions across imaging platforms, with a focus on USB-C interoperability and robust high-speed interfaces.

Qualifications

• BS or MS in Electrical Engineering or related field.
• 8+ years of hardware design experience with complex multilayer PCBs.
• Strong expertise in high-speed digital systems and imaging hardware.
• Hands-on lab debugging with oscilloscopes and analyzers.
• Experience guiding engineering teams and reviews.

Responsibilities

• Provide technical leadership across imaging hardware programs.
• Architect and validate high-performance PCBs for CMOS sensors.
• Lead hardware reviews and development planning.
• Mentor junior engineers and enforce design standards.
• Ensure USB-C interoperability and high-speed interface reliability.

Skills

High-speed design

PCB layout

Signal integrity

CMOS image sensor integration

Mentoring / leadership

USB-C interoperability

Education

BS/MS in Electrical Engineering or related

Tools

Altium Designer

Cadence Allegro

Job description

Fairchild Imaging, headquartered in San Jose, California, seeks a Senior Hardware Design Engineer to lead the design of PCB-based imaging platforms for CMOS sensors, cameras, and X-ray systems. You will drive high-speed hardware development, SI, sensor integration, and cross-functional collaboration.

The role requires hands-on leadership, mentoring, and architecture decisions across imaging platforms, with a focus on USB-C interoperability and robust high-speed interfaces.