Senior HSIO Bench Test Engineer

Qualcomm; San Diego (CA); On-site; USD 111,000 - 167,000; Full time

Benefits offered by this job

Competitive bonus program

RSU grants

Job summary

Qualcomm Technologies, Inc. in San Diego, CA, is seeking a Post Silicon Engineering specialist to develop test solutions for highly integrated SOCs and perform high-speed SERDES characterization across PCIe, USB4, UFS, DP, MIPI, and related interfaces.

The role focuses on defining test methodologies, driving silicon bring-up, PI/SI debugging, and collaboration with IC design, systems engineering, and customer teams to ensure robust designs and timely issue resolution in a fast-paced environment.

Qualifications

• Bachelor's degree in Electronics/Electrical/Computer Engineering or related field is required.

Responsibilities

• Define and execute development of test methodologies and characterization of high speed SERDES interfaces such as PCIe, USB4, UFS, DP, MIPI(DSI, CSI), PLLs and other proprietary interfaces.
• Develop and execute characterization plans for high speed interfaces to optimize design parameters and validate electrical compliance, drive first silicon bring up & debug to qualify designs.
• Assist in hardware design and debug power integrity (PI) and signal integrity (SI) issues related to package and board design.
• Collaborate closely with cross‑functional teams such as IC Design, Systems Engineering for chip/circuit bring up and debug, and with Customer Engineering and Hardware Applications teams to resolve customer issues/RMA debug in a time critical environment.
• Deliver quality work products, continually learn about Qualcomm products and industry trends, and conduct specialized analyses (feasibility studies, signal integrity, teardown analyses).

Skills

High speed validation

Signal integrity

SERDES concepts

Python/C# for test automation

Education

Bachelor's degree in Electronics/Electrical/Computer Engineering or related field

Master's Degree in Electronics/Electrical/Computer Engineering or related field

PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field

Tools

Oscilloscopes

TDRs/VNAs

J-BERT

Job description

Company: Qualcomm Technologies, Inc.

Job Area: Engineering Group, Engineering Group > Hardware Engineering

General Summary: This position is for the Post Silicon Engineering group that develops test solutions for highly integrated SOCs (System on Chip) designed by Qualcomm.

Responsibilities

Define and execute development of test methodologies and characterization of high speed SERDES interfaces such as PCIe, USB4, UFS, DP, MIPI(DSI, CSI), PLLs and other proprietary interfaces.

Develop and execute characterization plans for high speed interfaces to optimize design parameters and validate electrical compliance, drive first silicon bring up & debug to qualify designs fabricated at external foundries, and perform technical data analysis of parametric performance over various operating conditions and configurations.

Assist in hardware design and debug power integrity (PI) and signal integrity (SI) issues related to package and board design.

Collaborate closely with cross‑functional teams such as IC Design, Systems Engineering for chip/circuit bring up and debug, and with Customer Engineering and Hardware Applications teams to resolve customer issues/RMA debug in a time critical environment.

Deliver quality work products, continually learn about Qualcomm products and industry trends, and conduct specialized analyses (feasibility studies, signal integrity, teardown analyses).

Required Qualifications

• Bachelor's degree in Electronics/Electrical/Computer Engineering or related field.
• 5+ years of experience in high speed silicon validation.

Preferred Qualifications

• Master's Degree in Electronics/Electrical/Computer Engineering or related field.
• 3+ years of experience in related areas.
• Good understanding of VLSI technologies, CMOS analog and digital integrated circuits, mixed‑signal and semiconductor physics.
• Knowledge of high speed test and characterization including eye diagram characteristics, receiver JTOL performance, jitter analysis, signal integrity, etc.
• Familiarity with SERDES transmitter/receiver design blocks.
• Hands‑on experience with lab equipment such as oscilloscopes, TDRs/VNAs, J‑BERT, etc.
• Experience with Python/C# for test automation.
• Familiarity with board design concepts (schematic reviews, layout best practices, etc.) is a plus.
• Good ASIC device level characterization skills; system level knowledge is a plus.
• Strong verbal and written communication skills, good organization and documentation skills.
• Strong problem solving & debugging skills; ability to work independently and with good initiative to overcome technical challenges.
• Strong interpersonal and teamwork skills with proven ability to work effectively in a fast‑paced multi‑disciplinary environment.

Minimum Qualifications

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of hardware engineering or related work experience.
• Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of hardware engineering or related work experience.
• PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.

Benefits

Pay range: $111,300.00 – $166,900.00. Competitive annual discretionary bonus program and opportunity for annual RSU grants.

EEO Statement

Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other protected classification.