Senior HSIO Architect: PCIe/UCIe & SerDes Lead

TylSemi; San Jose (CA); On-site; USD 180,000 - 220,000; Full time

Job summary

TylSemi in San Jose is seeking a High-Speed IO Architect to lead the architecture of high-speed interfaces across product families. You will drive key decisions on SerDes architecture and UCIe integrations while collaborating with engineering teams and vendor partners.

The ideal candidate has over 15 years of experience, including significant expertise in PCIe and UCIe standards, alongside a strong track record in managing complex IP integrations.

Qualifications

• Proven experience in high-speed interface architecture and complex IP integrations.
• Familiarity with PCIe architecture and UCIe integration.
• Ability to manage signal integrity and channel simulations.

Responsibilities

• Define high-speed IO architecture for PCIe/Ethernet integration.
• Guide SerDes PHY selection and vendor assessments.
• Collaborate on protocol bridge design and PCIe certification.

Skills

High-speed interface architecture

PCIe expertise

Signal integrity expertise

UCIe standard familiarity

Education

15+ years in high-speed interface architecture

5+ years at Principal level or higher

Tools

HSPICE

IBIS-AMI

Job description

TylSemi in San Jose is seeking a High-Speed IO Architect to lead the architecture of high-speed interfaces across product families. You will drive key decisions on SerDes architecture and UCIe integrations while collaborating with engineering teams and vendor partners.

The ideal candidate has over 15 years of experience, including significant expertise in PCIe and UCIe standards, alongside a strong track record in managing complex IP integrations.