Senior High-Speed Analog IC Layout Engineer

Arrow Electronics; Texas; On-site; USD 120,000 - 190,000; Full time

Job summary

Arrow Electronics' eInfochips, an Arrow company, is seeking an Analog Layout Engineer to design physical silicon for high-speed mixed-signal blocks such as SerDes, ADCs, DACs, and PLLs. This onsite role is based in Austin, TX, with potential travel to client sites.

You will perform floor planning, integration, and layout-dependent noise control, ensuring robust reliability and ESD protection for advanced CMOS nodes with 5 to 12+ years of experience.

Qualifications

• 5 to 12+ years of hands-on custom IC layout experience in deep sub-micron or advanced CMOS/FinFET nodes (such as N3, N5, N7).
• Reliability & verification including DRC, LVS, ERC, antenna rules, EM/IR reliability, and ESD protection.
• Experience at lower nodes (N3, N5) is critical.
• Bachelor's degree required.

Responsibilities

• Floor Planning & Integration: Create block-level and chip-top-level floor plans, manage hierarchical block integration, and handle micro-bump or package-aware co-design.
• Parasitic & Noise Control: Address layout-dependent effects (LOD, WPE, LDE), device matching, common-centroid structures, guard rings, and isolation or shielding.

Skills

High-Speed Analog Layout

Floor planning

Parasitic & noise control

DRC/LVS/ERC

EM/IR reliability

ESD protection

Education

Bachelor's degree

Job description

Arrow Electronics' eInfochips, an Arrow company, is seeking an Analog Layout Engineer to design physical silicon for high-speed mixed-signal blocks such as SerDes, ADCs, DACs, and PLLs. This onsite role is based in Austin, TX, with potential travel to client sites.

You will perform floor planning, integration, and layout-dependent noise control, ensuring robust reliability and ESD protection for advanced CMOS nodes with 5 to 12+ years of experience.