Senior Hardware Validation Engineer - Power & SI

Anysilicon; Sunnyvale, Northern (CA, KY); Hybrid; USD 120,000 - 150,000; Full time

Job summary

Ascendion is seeking a hardware validation engineer to support AI-native hardware programs. The role emphasizes PI/SI validation, test data analysis, and cross-functional collaboration with EE, firmware, and layout teams to ensure robust hardware performance.

The candidate will review CM test reports, debug issues, and help develop SOPs for validation workflows, including high-speed interfaces and power sequencing.

Qualifications

• BS or MS in Electrical Engineering.
• 4+ years in EE hardware validation focusing on PI and SI.
• Proven ability to analyze test data and drive issues to closure with cross-functional teams.
• Experience reviewing test reports for correctness and identifying gaps.

Responsibilities

• Monitor validation progress and review CM test reports.
• Analyze failures and coordinate with EE design partners to resolve issues.
• Guide CM engineers on measurement procedures and perform PI/SI debugging.
• Track validation progress, maintain issue tracking, and communicate risks and status updates.
• Develop SOPs and provide technical guidance on validation processes.
• Validate measurement setups and troubleshoot complex hardware issues.
• Characterize DC-DC converters and validate power sequencing and stability.
• Perform high-speed interface validation for protocols while analyzing SI and timing issues.
• Review PCB schematics and layouts to support debugging and design testability improvements.
• Collaborate with firmware, layout, and hardware teams for successful hardware validation.

Skills

PI/SI measurements

SOP development

Schematic reading

High-speed interface validation

Technical documentation

Education

BS/MS in Electrical Engineering

Tools

MIPI CSI

SPI

I2C

I2S/PDM

USB

UART

Job description

Ascendion is seeking a hardware validation engineer to support AI-native hardware programs. The role emphasizes PI/SI validation, test data analysis, and cross-functional collaboration with EE, firmware, and layout teams to ensure robust hardware performance.

The candidate will review CM test reports, debug issues, and help develop SOPs for validation workflows, including high-speed interfaces and power sequencing.