Senior Hardware Security Architect - SoC & Packaging

NVIDIA; Santa Clara (CA); On-site; USD 272,000 - 431,000; Full time

Benefits offered by this job

Equity

Benefits

Job summary

NVIDIA seeks a Principal Hardware Security Architect to define and drive the security roadmap for next‑generation SoCs and GPUs. You will lead architecture for advanced packaging, photonics threats, and secure boot, collaborating with cross‑functional teams and external partners.

The role emphasizes deep hardware security expertise, threat modeling, and hands-on verification across IPs, with a focus on high‑assurance platform security and industry standards alignment.

Qualifications

• Education: MS or PhD in Electrical Engineering, Computer Science, or Computer Engineering.
• 15+ years of meaningful relevant work or research experience.
• Experience with ASIC design processes and architecture of large SoCs or GPUs.

Responsibilities

• Define Security Roadmap for platforms across hardware, software, research, and marketing teams.
• Research and develop mitigations against physical attacks and side-channel threats, aligning with SAFE standards.
• Analyze threats for advanced packaging technologies (2.5D/3D ICs) and silicon photonics connectivity.
• Lead AI-assisted vulnerability discovery and triage, evaluating AI-based security verification methodologies.
• Review architectural and verification specs to ensure IPs align with platform security requirements.
• Collaborate with customers and partners to identify and address security issues.

Skills

ASIC design experience

SoC/GPUs architecture

C/C++ programming

Verilog

ARM assembly

Python/Perl scripting

Threat modeling

Hardware security

Education

MS in Electrical Engineering/Computer Science/Computer Engineering

PhD or equivalent experience

Tools

Open Compute Project SAFÉ

Job description

NVIDIA seeks a Principal Hardware Security Architect to define and drive the security roadmap for next‑generation SoCs and GPUs. You will lead architecture for advanced packaging, photonics threats, and secure boot, collaborating with cross‑functional teams and external partners.

The role emphasizes deep hardware security expertise, threat modeling, and hands-on verification across IPs, with a focus on high‑assurance platform security and industry standards alignment.