Get more replies from employers
Send a job-specific resume in minutes.
Jobtailor is seeking a senior hardware validation engineer to lead hands-on post-silicon validation for networking ASICs and evaluation platforms in a San Jose lab. You will own early bring-up from first power-on to feature enablement and define validation plans across functionality, performance, and reliability.
You will drive lab readiness, test coverage strategy, and lab automation using Python while overseeing high-speed interfaces and complex signal integrity analyses.
Demonstrates expertise in post-silicon electrical validation, hardware bring-up, and lab-based silicon debug, with a strong focus on high-speed measurement techniques and scripting for lab automation. Proficient in analyzing signal integrity and power integrity while leading validation efforts for networking ASICs and interfaces.