Senior Hardware Engineer: SoC, FPGA & High-Speed Interfaces

Cisco Systems, Inc.; Milpitas (CA); On-site; USD 124,000 - 226,000; Full time

Benefits offered by this job

Medical insurance

401(k) matching

Parental leave

Disability coverage

Life insurance

RSU grants

Job summary

Cisco Systems, Inc. is seeking a hardware design professional to own the design and validation of complex hardware systems for server/compute or networking platforms.

You will contribute to technology roadmaps and collaborate with cross-functional teams to deliver high-quality products on schedule. The role requires 5+ years in system-level development with a strong background in hardware design, validation, and high-speed interfaces.

Qualifications

• Bachelor's degree in Electrical Engineering or Computer Engineering with 5+ years in system-level development.
• Experience in hardware designs and validation.

Responsibilities

• Own design and validation of a complex hardware system.
• Develop technology roadmap and drive innovation.
• Participate as a valuable team member to deliver quality products on time.
• Participate in cross-functional meetings and teams.
• Create functional specifications and technical requirement documentation.

Skills

Hardware design

Hardware validation

SoC architectures

FPGA development

High-speed interfaces

Cross-functional collaboration

Education

Bachelor's in Electrical/Computer Engineering

Master's in Electrical/Computer Engineering

PhD in Electrical/Computer Engineering

Tools

Cadence Concept

Allegro

Oscilloscopes

Logic Analyzers

Spectrum Analyzers

Job description

Cisco Systems, Inc. is seeking a hardware design professional to own the design and validation of complex hardware systems for server/compute or networking platforms.

You will contribute to technology roadmaps and collaborate with cross-functional teams to deliver high-quality products on schedule. The role requires 5+ years in system-level development with a strong background in hardware design, validation, and high-speed interfaces.