Senior Hardware Engineer (RTL / High-Level Synthesis)

Code Metal, Inc.

United States

Hybrid

USD 120,000 - 150,000

Full time

14 days+
Application generator

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Benefits offered by this job

Relocation assistance for qualifying c
Health Care Plan (Medical, Dental &amp
Paid Time Off (Uncapped Vacation, plus
Flexible hybrid work arrangement
Retirement Plan (401k, IRA)

Job summary

Code Metal, Inc. is seeking a senior hardware/software engineer to architect and expand our RTL generation from high-level algorithms. You will drive HLS integration, C++ passes, and produce auditable RTL, collaborating across disciplines to ensure rigorous verification and scalable deployment.

Join a team that values technical depth, ownership, and cross-functional collaboration, with a flexible hybrid work arrangement and relocation assistance for qualifying candidates.

Qualifications

  • 3+ years hands-on RTL or HLS experience with at least one commercial tool such as Catapult, Vitis HLS, or Stratus.
  • Experience with HDL verification flows and testbench development.
  • Strong debugging and problem-solving skills for RTL-to-RTL bridge.
  • Familiarity with Linux-based toolchains and scripting for automation.

Responsibilities

  • Architect and expand capabilities toward producing production-ready RTL from high-level descriptions.
  • Lead HLS integration and RTL code generation.
  • Develop C++ and post-HLS readability/optimization passes for auditable RTL.
  • Contribute to CI/CD qualification with automated RTL simulation, verification, and regression testing.

Skills

Python scripting
Fixed-point arithmetic
Bit-accurate types
RTL / VHDL
Linux development
FPGA architectures
Verification methodologies
DSP with Python/MATLAB
HLS tools
Debugging
Git / CI/CD
LLM-assisted code transformation

Tools

Catapult
Vitis HLS
Stratus
Python tooling

Job description

  • Code Metal is in the business of transpiling between different languages
  • This includes the transpilation tools enabled by AI and modern verification techniques — bridging the gap between algorithm development and deployment to embedded systems
  • We are currently looking for a senior hardware/software engineer interested in architecting and expanding our capabilities towards creating production-ready RTL from high-level algorithm descriptions
  • This role focuses on HLS integration and RTL code generation
  • You will be joining a team that values technical rigor, ownership, and collaboration across disciplines
  • Develop C++ and post-HLS readability and optimization passes to produce human-auditable RTL
  • Leveraging Agentic AI and verification capability within Code Metal
  • Contribute to CI/CD qualification including automated RTL simulation, functional verification, and regression testing
Benefits
  • Relocation assistance for qualifying employees
  • Health Care Plan (Medical, Dental & Vision)
  • Paid Time Off (Uncapped Vacation, plus Sick & Public Holidays)
  • Flexible hybrid work arrangement
  • Retirement Plan (401k, IRA)
  • Scripting experience in Python for development, toolchain automation and testing
  • Solid hardware modeling background regarding fixed-point arithmetic, bit-accurate types, synthesis pragmas and modeling trade-offs
  • Strong debugging and problem-solving skills
  • Experience with simulation and functional verification flows
  • 3+ years of hands-on experience with writing RTL code or using High-Level Synthesis, including at least one commercial HLS tool (Catapult, Vitis HLS, Stratus, or equivalent)
  • Solid understanding of RTL / VHDL
  • Experience using Linux-based development environments
  • Understanding of FPGA architectural capabilities and constraints
  • Knowledge of verification methodologies and testbench development
  • Experience with DSP algorithms and applications using Python/MATLAB
  • Bonus: Interest in or familiarity with LLM-assisted code transformation and readability tooling
  • Experience with Git-based development workflows and CI/CD environments
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