Senior Hardware Design Architect – Security Appliances

Cisco Systems, Inc; San Jose (CA); On-site; USD 150,000 - 210,000; Full time

Job summary

Cisco Systems, Inc. is seeking a Senior Hardware Design Engineer in San Jose to own the end-to-end hardware development lifecycle—architecture to mass production. You will lead complex circuit design, PCB layouts, and validation for secure, high-performance hardware appliances.

You will mentor junior engineers, drive cross-functional collaboration with software, BIOS and manufacturing, and apply AI-driven tools to optimize design cycles and reliability.

Qualifications

• Masters with 4+ years in hardware design
• Bachelor's with 7+ years in hardware design
• Experience taking hardware from concept to production
• Experience with Cadence Allegro/Concept and Mentor Graphics Xpedition

Responsibilities

• Lead the hardware development lifecycle from architecture to mass production.
• Architect and drive complex circuit designs, schematics, and PCB layouts for high-performance security appliances.
• Define and execute DVT strategies to meet regulatory and performance specs.
• Serve as primary technical authority for root-cause analysis of hardware issues.
• Collaborate with hardware, software, BIOS, and manufacturing teams to resolve bottlenecks.
• Drive design methodology improvements and maintain high-quality technical documentation.
• Mentor junior engineers and promote innovation.
• Leverage AI-driven design tools to streamline design cycles and improve quality.

Skills

Technical leadership

PCB design

System integration

DVT methods

Signal integrity

RTL/firmware interaction

Cross-functional collaboration

Education

Master's degree in engineering

Bachelor's degree in engineering

Tools

Cadence Allegro/Concept

Mentor Graphics Xpedition

Job description

Cisco Systems, Inc. is seeking a Senior Hardware Design Engineer in San Jose to own the end-to-end hardware development lifecycle—architecture to mass production. You will lead complex circuit design, PCB layouts, and validation for secure, high-performance hardware appliances.

You will mentor junior engineers, drive cross-functional collaboration with software, BIOS and manufacturing, and apply AI-driven tools to optimize design cycles and reliability.