Senior FPGA Verification Engineer - DO-254 Compliance

OKAYA INFOCOM; Melbourne (FL); On-site; USD 90,000 - 120,000; Full time

Job summary

OKAYA INFOCOM is seeking an FPGA/Hardware Engineer (DO-254) in Melbourne, FL, onsite. The role requires expert verification with SystemVerilog/UVM or equivalent lab/design verification experience. Strong Xilinx experience is a plus and interaction with India GETC‑I site is expected.

Responsibilities include RTL design and simulation, UVM environments, DO-254 artifacts, and DO-254 compliance for AEH DAL-A certification. 5+ years hardware experience preferred.

Qualifications

• Expert-level verification engineer with SystemVerilog/UVM experience or lab testing/design verification background.
• FPGA verification in lab testing or hardware verification testing.
• Experience with Xilinx devices is a strong plus.

Responsibilities

• Develop RTL code and testbenches using VHDL/Verilog/SystemVerilog.
• Create UVM environments and perform timing, linting, and CDC analyses.
• Prepare DO-254 artifacts for AEH DAL-A certification and assist FAA SOI audits.
• Capture requirements and drive architecture, synthesis, and place-and-route.

Skills

SystemVerilog

UVM

FPGA verification

Xilinx

lab testing

communication

Education

STEM degree

Tools

VHDL

Verilog

SystemVerilog

Job description

OKAYA INFOCOM is seeking an FPGA/Hardware Engineer (DO-254) in Melbourne, FL, onsite. The role requires expert verification with SystemVerilog/UVM or equivalent lab/design verification experience. Strong Xilinx experience is a plus and interaction with India GETC‑I site is expected.

Responsibilities include RTL design and simulation, UVM environments, DO-254 artifacts, and DO-254 compliance for AEH DAL-A certification. 5+ years hardware experience preferred.