Hardware Engineer

Galent; Melbourne (FL); On-site; USD 110,000 - 140,000; Full time

Job summary

Galent is seeking an experienced FPGA/Hardware Engineer to support the design, development, and verification of complex FPGA-based hardware systems for aerospace and avionics. The role emphasizes FPGA verification, RTL design, SystemVerilog/UVM, and DO-254-compliant processes.

Candidates should have 5+ years hands-on FPGA or ASIC experience, a STEM degree, and familiarity with Xilinx products. You'll collaborate with the India GETC I site and contribute to DO-254 artifacts and FAA audits.

Qualifications

• Expertise in SystemVerilog/UVM verification for FPGA/ASIC designs.
• Experience with Xilinx devices is a strong plus.
• Knowledge of DO-254 guidance and certification processes.

Responsibilities

• RTL design & simulation using VHDL, Verilog, and SystemVerilog.
• Verification: build UVM environments and perform timing, linting, and CDC analyses.
• DO-254 Certification: create AEH DAL-A artifacts and support FAA audits.
• Hardware lifecycle: capture requirements, architecture, synthesis, and placement & routing.

Skills

SystemVerilog/UVM

FPGA verification

RTL design

Lab testing

Education

STEM degree

Tools

Xilinx tools

Job description

Overview: We are seeking an experienced FPGA/Hardware Engineer to support the design, development, and verification of complex FPGA-based hardware systems for aerospace and avionics applications. This role is ideal for engineers with strong expertise in FPGA verification, RTL design, System Verilog/UVM, and hardware validation, along with experience working within regulated development environments such as DO-254.

Required Skills:

Expert-level verification engineer with strong System Verilog and/ or UVM experience or FPGA verification in lab testing and/or Hardware FPGA design verification testing

Experience with design on Xilinx products would be a strong plus

Expected to communicate effectively with emerging engineers at the India GETC I site and provide both technical and process (DO-254) guidance to the verification team.

Core Responsibilities

RTL Design & Simulation: Develop code and test benches using VHDL, Verilog, and SystemVerilog.

Verification: Create UVM-constrained random environments and conduct static timing, linting, and clock-domain crossing (CDC) analyses.

DO-254 Certification: Create artifacts required for Airborne Electronic Hardware (AEH) DAL-A certification and participate in FAA SOI audits.

Hardware Lifecycle: Handle requirements capture, decomposition, architecture development, synthesis, and placement & routing. [1]

Key Qualifications

Experience: Substantial hands‑on FPGA or ASIC development experience (typically 5+ years for a senior designation).

Education: Degree in a STEM (Science, Technology, Engineering, Mathematics) field.

Avionics Knowledge: Familiarity with design assurance standards (DO-254) is highly preferred.