Senior FPGA Verification Engineer – Build Next-Gen Systems

Socket.dev; San Jose (CA); On-site; USD 92,000 - 126,000; Full time

Job summary

Infineon Technologies in San Jose, CA, is seeking a Senior Engineer Verification to help shape the future of semiconductor solutions. You will architect and verify FPGA systems, integrate with embedded software, and drive debugging and platform bring-up.

The role emphasizes Verilog/SystemVerilog or VHDL, FPGA toolchains (Vivado, Synplify), and system-level verification, with opportunities to lead critical projects and collaborate across teams.

Qualifications

• Bachelor’s or master’s degree in electronic engineering, computer engineering, or related field (or equivalent experience).
• Strong FPGA development experience using Verilog/SystemVerilog and/or VHDL.
• Hands-on experience with tools (e.g., Xilinx Vivado/Synplify).
• Experience with verification and debug: simulation, test benches, assertions, and on-chip debug tools.

Responsibilities

• Architect and implement FPGA solutions for prototyping platform and link partner platform, including build (simulation, synthesis, P&R, timing closure, bitstream).
• Integrate FPGA logic with embedded software, drivers, and host interfaces (Ethernet, USB, UART, SPI, I2C, etc.).
• Bring up FPGA platforms: board-level testing, power-on sequencing, clocking/reset strategy, and peripheral enablement.
• Perform system-level debug.
• Document platform architecture, integration guides, and best practices for internal and downstream teams.

Skills

Verilog/SystemVerilog

VHDL

FPGA Development

Python

Tcl

Education

Bachelor's or Master in electronic engineering or computer engineering

Tools

Vivado

Synplify

ModelSim/VCS

Job description

Infineon Technologies in San Jose, CA, is seeking a Senior Engineer Verification to help shape the future of semiconductor solutions. You will architect and verify FPGA systems, integrate with embedded software, and drive debugging and platform bring-up.

The role emphasizes Verilog/SystemVerilog or VHDL, FPGA toolchains (Vivado, Synplify), and system-level verification, with opportunities to lead critical projects and collaborate across teams.