Senior FPGA Verification Engineer

STI; Santa Clara (CA); On-site; USD 100,000 - 130,000; Full time

Job summary

A leading technology firm is looking for an FPGA Verification Engineer to join their team in Santa Clara, CA. You will be responsible for verifying complex FPGA designs and collaborating closely with design engineers to enhance product quality. The ideal candidate will have a Bachelor's or Master's in Electrical Engineering and over 3 years of FPGA verification experience, with proficiency in SystemVerilog and industry-standard verification tools like QuestaSim and Synopsys VCS.

Qualifications

• 3+ years of experience in FPGA verification.
• Experience with scripting languages (e.g., Python, Perl).
• Familiarity with hardware description languages (e.g., VHDL, Verilog).

Responsibilities

• Develop and execute comprehensive verification plans for FPGA designs.
• Create and maintain test benches using industry-standard verification methodologies.
• Write and debug test cases to verify functionality, performance, and corner cases.

Skills

FPGA design principles

SystemVerilog

UVM verification methodology

debugging skills

communication skills

Education

Bachelor's or Master's degree in Electrical Engineering

Tools

QuestaSim

Synopsys VCS

Job description

A leading technology firm is looking for an FPGA Verification Engineer to join their team in Santa Clara, CA. You will be responsible for verifying complex FPGA designs and collaborating closely with design engineers to enhance product quality. The ideal candidate will have a Bachelor's or Master's in Electrical Engineering and over 3 years of FPGA verification experience, with proficiency in SystemVerilog and industry-standard verification tools like QuestaSim and Synopsys VCS.