Senior FPGA RF DSP Architect – End-to-End Space

Akkar; San Francisco (CA); On-site; USD 180,000 - 240,000; Full time

Benefits offered by this job

Equity package

Comprehensive benefits

Job summary

Akkar in San Francisco seeks a hands-on Senior FPGA & RF Signal Processing Engineer to own high-performance signal-processing systems from requirements to flight-ready hardware. You’ll guide architectures, select platforms, and implement DSP and FPGA designs with close collaboration across RF, antenna, and software teams.

Responsibilities include end-to-end FPGA lifecycle, architecture evaluation, DSP chain design, RTL development, verification, and lab bring-up to ensure robust, high-throughput

Qualifications

• 5+ years preferred in FPGA design with end-to-end ownership.
• Must own FPGA design from architecture to verified hardware.
• Deep SystemVerilog/Verilog/VHDL proficiency and fixed-point DSP.
• Strong RF front-end interfacing, ADC/DAC knowledge, and timing closure.
• Experience building automated verification with Python, MATLAB, UVM, or Cocotb.
• Export control requirements must be met (U.S. export control).

Responsibilities

• Lead full lifecycle of FPGA designs including RTL, simulation, synthesis, timing, bring-up, and delivery.
• Evaluate architectures and hardware platforms; perform trade studies.
• Design and implement DSP chains, including up/down conversion and beamforming.
• Write modular RTL and manage CDCs and timing constraints.
• Develop testbenches and verify against reference models using Python or MATLAB.
• Perform lab bring-up and hardware performance correlation.

Skills

End-to-End FPGA ownership

RTL proficiency

DSP fixed-point

RF front-end integration

Verification frameworks

Education

B.S. in Electrical Engineering

Tools

SystemVerilog

Verilog

VHDL

UVM

Cocotb

MATLAB

Python

Job description

Akkar in San Francisco seeks a hands-on Senior FPGA & RF Signal Processing Engineer to own high-performance signal-processing systems from requirements to flight-ready hardware. You’ll guide architectures, select platforms, and implement DSP and FPGA designs with close collaboration across RF, antenna, and software teams.

Responsibilities include end-to-end FPGA lifecycle, architecture evaluation, DSP chain design, RTL development, verification, and lab bring-up to ensure robust, high-throughput