Senior FPGA Engineer - Verilog & High-Perf Networking

GCS Recruitment; Kirkland (WA); On-site; USD 120,000 - 180,000; Full time

Job summary

GCS Recruitment is seeking an experienced FPGA Engineer to design and develop advanced FPGA solutions for a next‑generation satellite communication system. You will own the FPGA bitstreams, implement architectures in Verilog HDL, and collaborate with system architects to deliver high‑performance networking solutions.

You will lead the full lifecycle from design through synthesis, timing closure, and validation, building testbenches and prototypes while supporting integration and manufacturing

Qualifications

• Bachelor's degree in EE/CE or related field.
• 7+ years hands-on FPGA design experience.
• Strong Verilog HDL expertise for RTL design and verification.
• Experience with AMD Xilinx Versal ACAP and Microchip IGLOO2.

Responsibilities

• Own the development and delivery of FPGA bitstreams.
• Design, implement, verify FPGA architectures using Verilog HDL.
• Lead FPGA development through lifecycle: RTL, timing, simulation, lab validation.
• Collaborate with system architects and cross-functional teams.
• Develop tests and documentation; support production release.

Skills

Verilog

SystemVerilog

RTL design

Timing closure

CDC analysis

Education

Bachelor's degree in Electrical Engineering or related field

Tools

Vivado

Libero SoC

ModelSim

Vivado Simulator

VCS

Job description

GCS Recruitment is seeking an experienced FPGA Engineer to design and develop advanced FPGA solutions for a next‑generation satellite communication system. You will own the FPGA bitstreams, implement architectures in Verilog HDL, and collaborate with system architects to deliver high‑performance networking solutions.

You will lead the full lifecycle from design through synthesis, timing closure, and validation, building testbenches and prototypes while supporting integration and manufacturing