Senior FPGA Engineer: Space Networking & Security

Muon Space; San Jose (CA); Hybrid; USD 184,000 - 208,000; Full time

Benefits offered by this job

Equity compensation

Medical, dental, vision insurance

401k retirement plan

Paid vacation

Paid holidays

Sick leave

Parental leave

Job summary

Muon Space is seeking a Senior FPGA Engineer to design the network fabric and security architecture for next‑gen spacecraft. You will define data movement from sensors to downlink, write RTL, and work with the Staff Architect and HPC teams to realize secure, end-to-end solutions.

The role is hands-on with architectural influence; on-site in San Jose, CA three days per week, with collaboration across EE, payload, and compute teams. Competitive salary and equity offered.

Qualifications

• Bachelor's or Master's degree in CS/CE/EE with 5+ years FPGA experience.
• Experience with Ethernet, link aggregation, high-speed DACs and signal integrity considerations.
• Strong hands-on cryptographic hardware/firmware experience: AES, AES-GCM, ECC, IPSec/VPN; PQC familiarity.
• FEC schemes knowledge (Reed-Solomon) and translating BER to RTL implementations.
• Proven experience defining network packet flows, switching/routing, DPI, firewalling, VPN termination in FPGA/embedded systems.
• HDL/RTL skills (SystemVerilog/Verilog/VHDL) and modern FPGA verification methods.
• Ability to obtain and maintain a U.S. security clearance; active clearance is a plus.

Responsibilities

• Define the onboard networking architecture for Muon spacecraft, including switching, routing, packet filtering, firewalling, DPI, and VPN concepts.
• Define and implement end-to-end encryption, packet-based encryption at router level, and file-based encryption for onboard/downlink data.
• Drive the definition of an onboard Ethernet switching and routing device and evaluate options (COTS, semi-custom, FPGA-based).
• Design and build a spacecraft NoC and robust FPGA-to-FPGA links with health monitoring.
• Own the Ethernet PHY and MAC integration on FPGAs, link aggregation, and signal-integrity trade-offs with HPC/EE teams.
• Apply FEC schemes (Reed-Solomon) to onboard/inter-FPGA links; translate networking requirements into RTL.
• Integrate network fabric with customer payloads and ensure interoperability and link validation.
• Publish white papers on Muon networking/security; represent internally/externally where appropriate.
• Collaborate with Staff Onboard Compute Architect to harmonize networking with compute architecture.

Skills

FPGA design

Networking

Cryptography

Security architecture

SystemVerilog/Verilog

High-speed I/O

Secure data transmission

Education

Master's or Bachelor's in EE/CS/CE

5+ years FPGA experience

Tools

FPGA toolchains

Job description

Muon Space is seeking a Senior FPGA Engineer to design the network fabric and security architecture for next‑gen spacecraft. You will define data movement from sensors to downlink, write RTL, and work with the Staff Architect and HPC teams to realize secure, end-to-end solutions.

The role is hands-on with architectural influence; on-site in San Jose, CA three days per week, with collaboration across EE, payload, and compute teams. Competitive salary and equity offered.