Senior FPGA Engineer — Radar Systems & HDL Lead

Echodyne; Kirkland (WA); On-site; USD 137,000 - 205,000; Full time

Benefits offered by this job

RSU program

Full medical, dental, vision insurance

401(k) match

Paid company holidays

Flexible PTO

Job summary

Echodyne is seeking a Senior FPGA Development Engineer to design and integrate radar subsystems built from Echodyne’s leading radars. You will drive FPGA architecture and HDL practices, mentor junior engineers, and collaborate with radar, signal processing and software teams to deliver high-performance, secure FPGA solutions in a fast-paced environment.

You will own tasks, participate in design reviews, and help shape HDL development standards while ensuring quality and timely delivery across

Qualifications

• Bachelor degree in electrical/computer engineering or equivalent.
• 5+ years designing Verilog/SystemVerilog and VHDL solutions.
• Experience with hardware/PCB design and embedded software.

Responsibilities

• Architect, design, implement and test FPGA-based solutions.
• Write timing-optimized, robust VHDL/Verilog code.
• Own tasks and drive design reviews and peer reviews.
• Develop actionable design plans from requirements.
• Mentor junior engineers and set HDL practices.
• Collaborate with radar, signal processing, and software teams.
• Improve coding practices and tooling across engineering.
• Create reusable cross-platform architectures and frameworks.
• Support testing efforts across projects.
• Ensure system control and signal processing requirements are met.
• Provide technical direction to junior developers.

Skills

FPGA architectures

Verilog / SystemVerilog

VHDL

HDL design

Python scripting

JTAG debugging

DDR / memory interfaces

Embedded software debugging

Communication protocols

HDL tooling usage

Education

Bachelor of Science in Electrical Engineering / Computer Engineering / CS

Tools

Vivado

Quartus

QuestaSim

Blue Pearl

Git

JIRA

Job description

Echodyne is seeking a Senior FPGA Development Engineer to design and integrate radar subsystems built from Echodyne’s leading radars. You will drive FPGA architecture and HDL practices, mentor junior engineers, and collaborate with radar, signal processing and software teams to deliver high-performance, secure FPGA solutions in a fast-paced environment.

You will own tasks, participate in design reviews, and help shape HDL development standards while ensuring quality and timely delivery across