Senior FPGA Engineer: Low-Latency Systems Lead

P2P; New York (NY); On-site; USD 225,000 - 325,000; Full time

Benefits offered by this job

Annual discretionary bonus

401k with employer match

Comprehensive medical and dental insurance

Job summary

DRW is seeking a Senior FPGA Engineer to join our trading teams in NYC, Chicago, or London. This role requires experience in FPGA hardware engineering and strong skills in RTL logic design.

The candidate will participate in full development lifecycles and engage in critical tasks such as architecting new applications, evaluating hardware, and debugging in a lab setting. An attractive salary ranging from $225,000 to $325,000 is offered along with comprehensive benefits.

Qualifications

• 3+ years of experience in FPGA hardware engineering.
• Strong capacity to assess project feasibility based on hardware limitations.
• Experience in system-level design and testing.

Responsibilities

• Architect and implement new FPGA applications from scratch.
• Research and evaluate cutting-edge FPGA technologies.
• Propose solutions to FPGA/hardware limitations.

Skills

FPGA hardware experience

RTL logic design (Verilog)

System-on-chip architectures

TCP/IP stack knowledge

Functional verification methodologies

Education

Bachelor’s degree in Computer/Electrical Engineering

Tools

XILINX FPGA design flow

ALTERA FPGA design flow

Job description

DRW is seeking a Senior FPGA Engineer to join our trading teams in NYC, Chicago, or London. This role requires experience in FPGA hardware engineering and strong skills in RTL logic design.

The candidate will participate in full development lifecycles and engage in critical tasks such as architecting new applications, evaluating hardware, and debugging in a lab setting. An attractive salary ranging from $225,000 to $325,000 is offered along with comprehensive benefits.