Senior FPGA Engineer - High-Throughput SoC Timing

Anduril Industries

Washington (District of Columbia)

On-site

USD 166,000 - 220,000

Full time

14 days+

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Job summary

Anduril Industries in the United States is seeking an FPGA Engineer with deep experience in high‑throughput FPGA/SoC digital design to join Anduril Cyber. You will own RTL design, verification, and lab bring‑up, collaborating with software, DSP, and hardware teams to turn algorithm requirements into robust FPGA implementations.

The role emphasizes precision timing, high‑speed datapath development, and hands‑on validation across SDR platforms, with ongoing documentation to support maintainable

Qualifications

  • Strong experience with FPGA development on Xilinx or comparable platforms, including SoC/MPSoC-based or other high‑performance digital devices relevant to SDR systems.
  • Proficiency in VHDL, Verilog, or SystemVerilog, including simulation, timing closure, and resource/performance tradeoffs.
  • Experience building high‑speed digital interfaces and datapaths such as Ethernet-based packet movement, DMA‑adjacent flows, or streaming signal pipelines.
  • Hands‑on familiarity with precision timing, synchronization, sysref/clocking concepts, and deterministic interface behavior.
  • Experience with FPGA verification methodologies and automation, including regression‑oriented testbenches and CI‑backed validation.
  • Ability to collaborate effectively with software and DSP engineers on register interfaces, control surfaces, and integration boundaries.
  • Comfort debugging in the lab using oscilloscopes, logic analyzers, spectrum analyzers, or related instrumentation.
  • Strong written and verbal communication skills for technical design reviews and cross‑functional engineering work.

Responsibilities

  • Design and implement high‑throughput FPGA datapaths, packetization pipelines, timing-sensitive interfaces, and hardware‑near acceleration blocks.
  • Own RTL design, simulation, verification, and lab bring-up across VHDL, Verilog, or SystemVerilog‑based workflows.
  • Work closely with DSP, software, hardware, and systems engineers to turn algorithm and interface requirements into robust FPGA implementations.
  • Drive precision timing, synchronization, and throughput closure for the selected FPGA/SoC platform and adjacent high‑speed digital interfaces.
  • Document architectures, interfaces, and verification approaches clearly enough for cross‑functional integration and long‑term maintainability.
  • Support design reviews, technical trade studies, and lab debugging with a hands‑on, player‑coach engineering mindset.

Skills

FPGA design
RTL (VHDL/Verilog/SystemVerilog)
High‑speed interfaces
Precision timing
FPGA verification
Cross‑functional collaboration
Lab debugging tools
Clear technical communication

Tools

Xilinx
CI/CD tooling (GitLab)

Job description

Anduril Industries in the United States is seeking an FPGA Engineer with deep experience in high‑throughput FPGA/SoC digital design to join Anduril Cyber. You will own RTL design, verification, and lab bring‑up, collaborating with software, DSP, and hardware teams to turn algorithm requirements into robust FPGA implementations.

The role emphasizes precision timing, high‑speed datapath development, and hands‑on validation across SDR platforms, with ongoing documentation to support maintainable

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