Senior FPGA Engineer

Radley James

Philadelphia (Philadelphia County)

On-site

USD 300,000 - 500,000

Full time

14 days+

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Benefits offered by this job

Competitive compensation

Performance-based bonuses

Collaboration with expert engineers and traders

Job summary

A leading proprietary trading firm is seeking an exceptional FPGA Engineer to enhance their low-latency technology team. This role involves designing cutting-edge FPGA solutions that significantly improve trading performance. Ideal candidates will have strong FPGA/ASIC experience, collaboration skills, and a passion for optimizing hardware for extreme performance. The position offers competitive salary and performance-based bonuses.

Qualifications

Proven experience in FPGA design.
Strong problem-solving skills and passion for performance.

Responsibilities

Design and implement FPGA-based solutions.
Optimize designs for low latency and performance.
Collaborate with teams on hardware acceleration.

Skills

FPGA/ASIC design using VHDL or Verilog

Digital logic design and hardware optimization

Timing closure

Experience with FPGA toolchains

Knowledge of network protocols

C/C++ or Python for tooling

Tools

Xilinx Vivado

Intel Quartus

Job description

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This range is provided by Radley James. Your actual pay will be based on your skills and experience — talk with your recruiter to learn more.

Base pay range

$300,000.00/yr - $500,000.00/yr

A leading proprietary trading firm seeking an exceptional FPGA Engineer to join their low-latency technology team. You will design and implement cutting-edge FPGA solutions that gives them a competitive edge in global financial markets.

What you’ll do

Architect, design, and implement FPGA-based solutions for ultra-low latency trading systems.
Optimize FPGA designs for throughput, resource utilization, and nanosecond-level performance.
Collaborate with traders, software engineers, and hardware specialists to translate market strategy into hardware acceleration.
Drive the full hardware development lifecycle, from concept to deployment and testing in live environments.
Evaluate and integrate the latest FPGA technologies and toolchains.

What we’re looking for

Proven experience in FPGA/ASIC design using VHDL or Verilog.
Strong background in digital logic design, hardware optimization, and timing closure.
Experience with FPGA toolchains (Xilinx Vivado, Intel Quartus, or similar).
Knowledge of network protocols (Ethernet, TCP/IP, UDP, multicast) and experience with high-speed I/O.
Familiarity with C/C++ or Python for tooling, testing, and integration.
A passion for performance, problem-solving, and working at the intersection of hardware and finance.

Nice to have

Experience in low-latency/high-frequency trading environments.

Why this opportunity

Work on mission-critical systems where every nanosecond matters.
Collaborate with world-class engineers and traders.
Competitive compensation with performance-based bonuses.
Cutting-edge hardware, research-driven environment, and a culture of innovation.

If you thrive on pushing hardware to its limits and want to see your work directly impact trading performance, we’d love to hear from you.

Seniority level