Senior FPGA Design Engineer – Space Applications

Firefly Aerospace; Cedar Park (TX); On-site; USD 110,000 - 160,000; Full time

Benefits offered by this job

Health, dental and vision plans

Parental leave

Educational reimbursement

Short term disability

Flexible PTO

Job summary

Firefly Aerospace, headquartered in north Austin, Texas, seeks an experienced FPGA RTL Design Engineer with 3+ years of Verilog hardware design to implement and optimize digital logic in PolarFire SoCs for space-grade applications.

You will develop RTL, testbenches, and integrate IP blocks with RISC‑V cores, collaborating across hardware and software teams to deliver mission-critical firmware and robust verification environments.

Qualifications

• 3–5 years of professional RTL design experience using Verilog for FPGAs.
• Full FPGA design flow experience: RTL coding, simulation, synthesis, place-and-route, timing analysis.
• Proficiency with Xilinx Vivado or Intel Quartus.

Responsibilities

• Design, develop, and verify FPGA logic for Microchip PolarFire SoCs in high-reliability embedded systems.
• Create and optimize IP cores and custom peripherals/accelerators.
• Integrate FPGA firmware with embedded processors and support BSPs and Linux drivers.
• Build RTL verification environments with UVM testbenches.
• Perform functional verification, simulation, regression testing, and coverage analysis.
• Conduct synthesis, place‑and‑route, timing analysis, and debugging with Libero SoC and scope tools.
• Implement radiation-tolerant and fault-tolerant designs for space-grade applications.
• Develop automated test benches and CI pipelines for verification, including HIL testing.
• Contribute to system architecture, security, and real‑time processing requirements.
• Participate in code reviews, documentation, and stay updated on FPGA technologies.

Skills

RTL design

Verilog

SystemVerilog

VHDL

Education

Bachelor's or Master's degree in Electrical Engineering / Computer Engineering

Tools

Libero SoC

Xilinx Vivado

Intel Quartus

Job description

Firefly Aerospace, headquartered in north Austin, Texas, seeks an experienced FPGA RTL Design Engineer with 3+ years of Verilog hardware design to implement and optimize digital logic in PolarFire SoCs for space-grade applications.

You will develop RTL, testbenches, and integrate IP blocks with RISC‑V cores, collaborating across hardware and software teams to deliver mission-critical firmware and robust verification environments.