Senior FPGA/ASIC Engineer — Secret Clearance Needed

Indotronix Avani Group; El Segundo (CA); On-site; USD 110,000 - 160,000; Part time

Job summary

Indotronix Avani Group is seeking a Senior Electrical or Computer Engineer to contribute to FPGA/ASIC design and verification for secure military GPS and high-reliability digital systems. This 1-year contract requires an active Secret clearance (Top Secret acceptable if willing to work at Secret level) and hands-on lab integration.

You will drive requirements capture, RTL design in VHDL/Verilog, high-speed timing analysis, and functional verification within air-gapped environments, collaborating

Qualifications

• Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field.
• Expertise in FPGA design and/or verification.
• Strong VHDL experience.
• Proficiency with Intel/Altera FPGA tools, ModelSim, Synopsys.
• Experience with high-speed digital systems and interfaces.
• Ability to work independently and communicate clearly in documentation and presentations.

Responsibilities

• Requirements capture and development of FPGA/ASIC digital architectures.
• RTL design and implementation in VHDL or Verilog.
• Timing analysis and closure on high-speed digital systems.
• Resource trade-off analysis and design optimization.
• Functional verification of RTL blocks and subsystems.
• Support constrained-random, functional coverage, and best-practice verification methodologies.
• Hands-on FPGA/ASIC validation using advanced lab equipment.
• Work within secure, air-gapped environments for system bring-up.
• Integration support with multidisciplinary engineering teams.

Skills

FPGA design

FPGA verification

VHDL

High-speed digital systems

Independent work

Documentation

Education

Bachelor’s degree in Electrical/Computer Engineering

Tools

Intel/Altera tools

ModelSim

Synopsys

FPGA vendor toolchains

Job description

Indotronix Avani Group is seeking a Senior Electrical or Computer Engineer to contribute to FPGA/ASIC design and verification for secure military GPS and high-reliability digital systems. This 1-year contract requires an active Secret clearance (Top Secret acceptable if willing to work at Secret level) and hands-on lab integration.

You will drive requirements capture, RTL design in VHDL/Verilog, high-speed timing analysis, and functional verification within air-gapped environments, collaborating