Senior Foundry Interface Engineer: Yield & AI

Sitime-Corporation; Santa Clara (CA); On-site; USD 148,000 - 204,000; Full time

Benefits offered by this job

Quarterly bonus

Equity grants

401k plan

Health, dental, vision, life insurance

Parental leave

Legal services

Time off plans

Job summary

SiTime, the Precision Timing company, seeks a Principal Foundry Interface Engineer in Santa Clara, CA, to lead foundry interactions and yield improvements across complex semiconductor processes. You will oversee transfer projects, drive continuous improvement, and ensure timely wafer release in a fast-paced environment.

The role requires advanced degrees and extensive experience in wafer yield engineering, with strong leadership, communication, and cross-functional collaboration skills.

Qualifications

• Master’s degree with 13+ years of experience or PhD with 10+ years in semiconductor process integration or wafer yield engineering.
• English proficiency required for professional communication.
• Proven track record in yield Pareto construction, modeling and roadmaps.
• Experience with AI/ML predictive modeling for test chips and high-volume products.
• Extensive collaboration with foundries and porting between fabs.
• Deep knowledge of inline inspection, SORT and device reliability; DFm/PFMEA.

Responsibilities

• Lead Foundry yield improvement and mitigation of yield detractors.
• Manage Foundry yield excursions and implement Continuous Improvement Plan.
• Manage Foundry safe launch.
• Provide technical guidance on Foundry Fab transfer projects.
• Direct wafer lot progress, DOE strategies and process skew splits during development.
• Ensure compliance with fab yield, E-test, WAT, inline Cp/CpK metrics.
• Communicate process health status to internal stakeholders; drive on-time wafer release and escalations.

Skills

Leadership

Communication

Project management

Cross-functional collaboration

Education

Master’s degree or PhD in a relevant field

Tools

PDF Exensio

Big Data Analysis tools

Job description

SiTime, the Precision Timing company, seeks a Principal Foundry Interface Engineer in Santa Clara, CA, to lead foundry interactions and yield improvements across complex semiconductor processes. You will oversee transfer projects, drive continuous improvement, and ensure timely wafer release in a fast-paced environment.

The role requires advanced degrees and extensive experience in wafer yield engineering, with strong leadership, communication, and cross-functional collaboration skills.