Senior Formal Verification Engineer

Velaura AI, Inc.; Santa Clara (CA); Hybrid; USD 200,000 - 300,000; Full time

Job summary

Velaura AI, Inc. seeks a Senior Formal Verification Engineer to define, own, and scale the formal verification program for its next-generation Physical AI SoC.

You will prove correctness exhaustively, tame state-space explosion, and collaborate with architects, RTL, and verification teams to reach comprehensive coverage. You will craft high‑quality SVA properties, formal testbenches, and reusable apps; drive proofs, benchmarks, and CI hooks; and contribute to a culture of technical excellence

Qualifications

• 10+ years in functional verification with hands-on formal verification of complex digital systems.
• Track record solving hard formal problems—CPU/processor DV, FP/arithmetic datapath, or vector units.
• Deep expertise with SystemVerilog Assertions (SVA) and formal property development.

Responsibilities

• Own and drive formal verification for complex SoC blocks like CPUs, control processors, FPUs, and SIMD engines.
• Write high-quality SVA properties and formal testbenches for functional correctness, including end-to-end checks.
• Apply full proofs, bounded model checking, and abstraction to close proofs on deep-state designs.

Skills

SystemVerilog Assertions (SVA)

Formal verification

Proofs / formal methods

JasperGold / VC Formal / Questa Formal

Scripting / CI

CPU/SoC architecture

Tools

JasperGold

VC Formal

Questa Formal

OneSpin

CI automation tooling

Job description

Role Overview

We are looking for a talented Senior Formal Verification Engineer to define, own, and scale the formal verification effort that hardens Velaura's next-generation Physical AI SoC. You will apply formal methods to the hardest correctness problems in the design, working with architects, RTL, and verification teams to prove correctness exhaustively and reach coverage that simulation cannot. We welcome engineers who enjoy reasoning rigorously about complex hardware, taming state-space explosion, and finding the corner-case bugs no one else can.

Responsibilities

• Own and drive formal verification for complex SoC blocks—CPUs, control processors, floating-point units, vector/SIMD engines, and datapath-heavy designs.
• Write high-quality SVA properties and formal testbenches to prove functional correctness, including end-to-end and datapath-equivalence checks.
• Apply full proofs, bounded model checking, assume-guarantee reasoning, and abstraction to close proofs on deep-state designs.
• Debug counterexamples and drive convergence on hard proofs using abstraction, constraints, and decomposition.
• Verify floating-point and arithmetic units for IEEE-754 compliance using formal datapath and equivalence checking.
• Build reusable formal apps: connectivity, register/CSR, deadlock/liveness, X-propagation, and control-path proofs.
• Define constraints and modeling assumptions, and prove them consistent and non-over-constraining.
• Drive formal coverage closure and integrate it into the overall verification signoff plan.
• Partner with architects, RTL, and simulation teams to align on what to prove formally versus in simulation.
• Maintain automated infrastructure, scripting, and CI hooks for formal regression and proof tracking.
• Use modern AI-assisted verification and debug workflows to improve productivity and coverage.
• Contribute to a culture of technical excellence and continuous improvement.

Required Qualifications

• 10+ years in functional verification, with substantial hands-on formal verification of complex digital systems.
• Track record solving hard formal problems—CPU/processor DV, floating-point/arithmetic datapath, or vector/SIMD units.
• Deep expertise with SystemVerilog Assertions (SVA) and formal property development.
• Hands-on experience with JasperGold, VC Formal, or Questa Formal / OneSpin.
• Experience developing constraints and proving them consistent and non-over-constraining.
• Strong grasp of computer architecture, microarchitecture, SoC design, and digital fundamentals.
• Understanding of floating-point arithmetic, IEEE-754, and datapath correctness.
• Strong analytical skills and rigorous, mathematical reasoning about hardware.
• Strong scripting and automation skills for build, regression, and CI pipelines.
• Ability to work effectively in a collaborative, multidisciplinary team.

Preferred Qualifications

• Experience with formal datapath verification and arithmetic equivalence checking (e.g., C/C++/SystemC reference models vs. RTL).
• Experience verifying vector, SIMD, or matrix/tensor compute units.
• Experience with security verification (secure/non-secure isolation, information-flow, fault/side-channel) using formal methods.
• Experience with formal protocol verification of standard interconnects (e.g., AMBA AXI/ACE, CHI) using assertion IP.
• Familiarity with cache coherence, memory-consistency, and interconnect protocol verification.
• Familiarity with clock-domain-crossing (CDC) and reset-domain-crossing (RDC) formal signoff.
• Experience with sequential equivalence checking (SEC) and low-power (UPF) formal verification.
• Experience with AI, machine learning, or edge AI hardware.
• Familiarity with robotics, drones, autonomous vehicles, or industrial automation systems.
• Experience with functional-safety standards such as ISO 26262, IEC 61508, IEC 61511, or ISO 13849.
• Experience using modern AI tools and workflows to accelerate engineering productivity.

Background in CPUs, GPUs, AI accelerators, networking and communications silicon, storage and data movement architectures, robotics and autonomous systems, automotive and ADAS platforms, aerospace and defense systems, real-time and safety-critical computing, or functional safety architectures and methodologies.

$200,000 - $300,000 a year

Compensation & Benefits

At Velaura, we believe exceptional talent deserves exceptional rewards. Compensation for this role includes a base salary and very competitive equity compensation, allowing team members to share in the company’s long-term success.

The base pay listed represents a good faith estimate that the Company reasonably expects to pay for this position at the time of hire. Actual compensation will depend on multiple factors, including the candidate's skills, qualifications, relevant experience, and geographic location.

In addition to base salary and equity compensation, Velaura offers a comprehensive benefits package that may include medical, dental, and vision coverage; paid time off; flexible work arrangements; professional development opportunities; and other benefits designed to support the well-being and growth of our team.

Velaura is committed to pay equity and transparency and regularly benchmarks compensation to ensure we remain competitive in the market.

Why Velaura?

Velaura is building next-generation compute technology for cloud, edge, and PhysicalAI. Our solutions will enable robots, autonomous systems, drones, and other intelligentmachines to operate efficiently in the physical world.
This is an opportunity to help build foundational technology at a time when the industry is undergoing fundamental change. You will work alongside experienced leaders, architects, engineers, and operators who have delivered industry-defining products across mobile, cloud, semiconductor, and AI platforms. If you enjoy solving difficult problems, working across disciplines, and helping shape thefuture of Physical AI, we would love to hear from you.

Equal Employment Opportunity and Accommodations

Velaura is an Equal Opportunity Employer that is committed to inclusion and diversity.Qualified applicants will receive consideration for employment without regard to race,color, religion, national origin, gender, sexual orientation, gender identity, disability orprotected veteran status. We also take affirmative action to offer employment
opportunities to minorities, women, individuals with disabilities, and protected veterans.

Velaura is committed to working with qualified individuals with physical or mentaldisabilities. Applicants who would like to contact us regarding the accessibility of ourwebsite or who need special assistance or a reasonable accommodation for any part ofthe application or hiring process may contact us at: [e-mail]. This contact
information is for accommodation requests only. Evaluation of requests for reasonableaccommodation will be determined on a case-by-case basis.