Lead Formal Verification Architect: End-to-End SoC Strategy

SiFive; Santa Clara (CA); On-site; USD 280,000 - 342,000; Full time

Job summary

SiFive is seeking a Distinguished Formal Verification Architect to define end-to-end verification strategies for complex SoC and IP subsystems. You will lead with deep expertise in complexity management and formal methods to ensure robust verification across large designs.

The role emphasizes identifying high-risk architectural corners, developing formal methodologies, and achieving proof convergence while mapping designs to formal verification needs. Remote potential varies by project.

Qualifications

• Multiple years of experience with formal verification of cutting edge HW designs.
• Experience with model checkers such as VCFormal, Jasper Gold.
• Proficient in working with large designs and standard practices for abstractions, etc. for dealing with large systems.
• Excellent understanding of HW design and idioms, e.g. CPU microarchitecture, communications fabrics, protocols, etc, and how to map them to formal verification needs.
• Strong logical thinking
• Strategic thinking and ownership to close verification with formal methods or formal/simulation co-verification

Responsibilities

• Deep expertise in complexity management, abstraction techniques and exhaustive verification.
• Expert in identifying high-risk architectural corners and developing formal methodology.
• Adept at proof convergence and thinking in terms of correct-by construction, working not just with individual designs but classes of design.

Skills

Formal verification

Model checking

HW design understanding

Proof convergence

Strong logical thinking

Tools

VCFormal

Jasper Gold

Job description

SiFive is seeking a Distinguished Formal Verification Architect to define end-to-end verification strategies for complex SoC and IP subsystems. You will lead with deep expertise in complexity management and formal methods to ensure robust verification across large designs.

The role emphasizes identifying high-risk architectural corners, developing formal methodologies, and achieving proof convergence while mapping designs to formal verification needs. Remote potential varies by project.