Advanced ASIC FPGA Engineer

Anysilicon; Pittsfield, Northern (MA, KY); Hybrid; USD 120,000 - 170,000; Full time

Job summary

General Dynamics Mission Systems, Inc is seeking an experienced ASIC/FPGA Design Engineer in Pittsfield, MA to lead digital design efforts, transition FPGA designs to ASIC, and mentor a small team. The role requires a strong background in digital design and hardware integration.

The candidate will define, design, verify, and document ASIC/FPGA developments, evaluate design flows, and collaborate with packaging on FPGA-to-ASIC conversions while ensuring project scope, schedule, and cost

Qualifications

• Bachelor's degree in Electrical or Computer Engineering or related field with 5+ years of experience; or Master's with 3+ years of experience.
• Ability to obtain a DoD Security Clearance within 18 months.
• U.S. citizenship is required.

Responsibilities

• Lead digital design efforts using VHDL on FPGA platforms and transition to ASIC implementation.
• Define, design, verify, and document ASIC/FPGA developments.
• Determine architecture and detailed design approach with a focus on VHDL-based digital design.
• Create test and simulation plans to establish functional criteria and verify test results.
• Evaluate process flow including design, synthesis, and timing analysis.
• Collaborate with the ASIC packaging team for FPGA-to-ASIC conversion.
• Mentor engineers through the conversion process and best practices.
• Support program execution with awareness of project scope, schedule, and cost objectives.

Skills

VHDL

Mentoring

Written and verbal communication

Team collaboration

Education

Bachelor's degree in Electrical or Computer Engineering

Master's degree

Tools

Microsemi FPGA

Xilinx FPGA

Vivado

Libero

Mentor

Cadence

Oscilloscopes

Logic analyzers

JTAG debuggers

Job description

General Dynamics Mission Systems, Inc, 1 Plastics Avenue, Pittsfield, MA 01201

Job Description:

General Dynamics Mission Systems is seeking an experienced ASIC/FPGA Design Engineer to lead digital design efforts using VHDL, transitioning designs from FPGA to ASIC. This role involves mentoring a small team and requires a strong background in digital design and hardware integration.

Responsibilities:

• Lead digital design efforts using VHDL on FPGA platforms and transition to ASIC implementation.
• Define, design, verify, and document ASIC/FPGA developments.
• Determine architecture and detailed design approach with a focus on VHDL-based digital design.
• Create test and simulation plans to establish functional criteria and verify test results.
• Evaluate process flow including design, synthesis, and timing analysis.
• Collaborate with the ASIC packaging team for FPGA-to-ASIC conversion.
• Mentor engineers through the conversion process and best practices.
• Support program execution with awareness of project scope, schedule, and cost objectives.

Qualifications:

• Bachelor's degree in Electrical or Computer Engineering, or related field with 5+ years of experience; or a Master's degree with 3+ years of experience.
• Ability to obtain a DoD Security Clearance within 18 months.
• U.S. citizenship is required.

Skills:

• Proficient in VHDL for digital design and simulation.
• Hands-on experience with Microsemi and/or Xilinx FPGA platforms.
• Proficient with Vivado, Libero, Mentor, and/or Cadence EDA tools.
• Experience with hardware integration using lab tools (oscilloscopes, logic analyzers, JTAG debuggers).
• Ability to mentor others through complex technical processes.
• Strong written and verbal communication skills.