Senior FAE: Chiplet PDN & SoC Power Solutions

Powerlattice Technologies Inc

United States

Hybrid

USD 150,000 - 225,000

Full time

3 days ago
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Job summary

Powerlattice Technologies Inc. seeks a Sr. Field Applications Engineer to support customers adopting a chiplet-based PDN solution.

You will bridge internal design teams and tier-one customers, leveraging deep technical credibility with customer engineering teams working on advanced xPU SoCs. The role is hybrid, with onsite days in Chandler, AZ or San Jose, CA. The ideal candidate is highly organized, proactive, and able to act as a trusted technical advisor in a fast-paced startup environment,

Qualifications

  • 5+ years of experience in power integrity and/or signal integrity for high-performance SoCs.
  • Experience with package-level power integrity and signal integrity (motherboard, substrates, interposers, advanced packaging 2.5D/3D).
  • Strong debugging skills to reproduce and resolve technical issues.
  • Excellent written and verbal communication with customer engineering teams.
  • High level of professionalism, discretion, and sound technical judgment.
  • Comfortable working independently and proactively solving problems.

Responsibilities

  • Enable customers to design GPU/CPU SoC power solution with Powerlattice’s chiplet.
  • Assist customer’s PDN design optimization using Powerlattice’s design kit.
  • Gather customer feedback and translate insights into product improvements.
  • Assist customers through the full adoption lifecycle, from early modeling through physical design and system bring-up.
  • Maintain strict confidentiality and handle sensitive technical information with discretion.
  • Act as a primary technical point of contact for tier-one customers.

Skills

Power integrity
Signal integrity
Customer engagement
Debugging skills
Communication
Problem solving

Job description

Powerlattice Technologies Inc. seeks a Sr. Field Applications Engineer to support customers adopting a chiplet-based PDN solution.

You will bridge internal design teams and tier-one customers, leveraging deep technical credibility with customer engineering teams working on advanced xPU SoCs. The role is hybrid, with onsite days in Chandler, AZ or San Jose, CA. The ideal candidate is highly organized, proactive, and able to act as a trusted technical advisor in a fast-paced startup environment,

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