Senior ESD Tools Engineer – PDK & Automation

Intel Corporation; Hillsboro (OR); Hybrid; USD 150,000 - 285,000; Full time

Benefits offered by this job

Health benefits

Stock bonuses

Retirement plans

Vacation

Job summary

Intel Corporation in Hillsboro, Oregon, is seeking a qualified engineer to join the DTP/PDK team. You will develop ESD/LU rule decks, align with DRM and reliability requirements, and collaborate with design, reliability, and CAD teams.

You will build test cases, define QA requirements, and drive automation for robust rule checks. The role requires a Master's or PhD in EE/CE and 2+ years of ESD rule deck experience, with scripting skills.

Qualifications

• Master's degree or PhD in Electrical Engineering or Computer Engineering.
• 2+ years' experience with ESD PERC rule decks/runset development and debugging.
• 2+ years' experience in scripting (Python, Tcl, Perl, or similar) for QA and flow automation.

Responsibilities

• Develop ESD/LU rule decks aligned with the ESD DRM and reliability requirements.
• Create and maintain reliability ESD and LU design rule methodologies and specifications.
• Collaborate with internal design, reliability, and CAD teams as well as external EDA vendors to define and implement new tool features.
• Build and execute test cases for rule debugging, validation, and signoff.
• Define QA requirements and drive related automation to improve robustness and efficiency of rule checks.
• Lead innovation initiatives to enhance existing ESD/LU verification automation, tools, and methodologies.
• Identify and analyze ESD/LU design problems, define root causes, and drive practical solutions across teams.

Skills

ESD PERC rule decks

Scripting (Python/Tcl/Perl)

DRC tooling/reliability

Education

Master's or PhD in Electrical Engineering or Computer Engineering

Job description

Intel Corporation in Hillsboro, Oregon, is seeking a qualified engineer to join the DTP/PDK team. You will develop ESD/LU rule decks, align with DRM and reliability requirements, and collaborate with design, reliability, and CAD teams.

You will build test cases, define QA requirements, and drive automation for robust rule checks. The role requires a Master's or PhD in EE/CE and 2+ years of ESD rule deck experience, with scripting skills.