Senior EDA Tools Engineer for PERC/ESD Rules

Intel Corporation; Hillsboro (OR); On-site; USD 150,000 - 285,000; Full time

Job summary

Intel Corporation in Hillsboro, Oregon, is seeking an experienced ESD/PDK engineer to join the Design Technology Platform (DTP) team. You will develop ESD/LU rule decks to enable reliable and fast path-to-market for Intel's advanced processes.

Join a dynamic group focused on PERC ESD design rules, automation, and cross-disciplinary collaboration with design, reliability, and CAD teams to deliver robust technologies.

Qualifications

• Master's degree or PhD in Electrical Engineering or Computer Engineering.
• 2+ years' experience with ESD PERC rule decks/runset development and debugging (or equivalent reliability/DRC tools).
• 2+ years' experience in scripting (e.g., Python, Tcl, Perl, or similar) for QA and flow automation.

Responsibilities

• Develop ESD/LU rule decks aligned with the ESD Design Rule Manual (DRM) and reliability requirements.
• Create and maintain reliability ESD and LU design rule methodologies and specifications.
• Collaborate with internal design, reliability, and CAD teams as well as external EDA vendors to define and implement new tool features and requirements.
• Build and execute test cases for rule debugging, validation, and signoff.
• Define QA requirements and drive related automation to improve robustness and efficiency of rule checks.
• Lead innovation initiatives to enhance existing ESD/LU verification automation, tools, and methodologies.
• Identify and analyze ESD/LU design problems, define root causes, and drive practical solutions across teams.

Skills

ESD PERC rule decks

Scripting for QA/Automation

QA/validation automation

Education

Master's degree or PhD in Electrical Engineering or Computer Engineering

Tools

ESD/DRC tools

Job description

Intel Corporation in Hillsboro, Oregon, is seeking an experienced ESD/PDK engineer to join the Design Technology Platform (DTP) team. You will develop ESD/LU rule decks to enable reliable and fast path-to-market for Intel's advanced processes.

Join a dynamic group focused on PERC ESD design rules, automation, and cross-disciplinary collaboration with design, reliability, and CAD teams to deliver robust technologies.