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Samsung Semiconductor Inc. in San Jose is seeking a Senior CPU Architecture & Performance Engineer to drive microarchitectural research for data‑center workloads and agentic AI CPUs. You will model performance, collaborate with RTL teams, and turn ideas into validated silicon designs.
Expect ownership across front‑end to back‑end exploration and pioneering methodologies. The role emphasizes AI‑driven workflows, collaboration with senior engineers, and contribution to publications while shaping
To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period.
Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what's possible and powering the future.
Architecture Research Lab is focused on researching next-generation CPU (RISC-V) microarchitecture and performance for emerging computing workloads. We explore new architectural ideas, evaluate their performance potential, and rapidly turn promising concepts into working designs that can be validated on real silicon. Our research is driven by emerging opportunities in data center and agentic AI workloads, where we investigate how CPU architecture can evolve to meet new performance and efficiency requirements. We also explore CPU‑memory co‑design from the CPU perspective, in alignment with the broader shift toward memory‑centric architectures. A distinctive aspect of our team is the way we approach architecture research. We develop and apply AI‑driven methodologies to accelerate architectural exploration, broaden the design space we can investigate, and quickly iterate from ideas to implementation and silicon validation. Rather than simply following established design flows, we continuously seek new ways to explore, evaluate, and realize CPU architectures. The role offers an opportunity to work across the full spectrum of architecture research‑from workload and performance analysis, microarchitectural innovation, and architectural modeling to implementation and silicon validation‑while helping shape new methodologies for how future CPUs are designed.
Daily onsite presence at our San Jose office in alignment with our Flexible Work policy
As a Senior CPU Architecture & Performance Engineer, you will drive both microarchitectural research and performance modeling for next‑generation CPU architectures. You will analyze emerging workloads, develop and refine performance models, identify architectural opportunities, and turn quantitative insights into new microarchitectural concepts. You will work closely with RTL design teams to evaluate, refine, and implement promising ideas, taking them from architectural modeling through RTL and silicon validation. The role offers significant ownership in shaping new CPU architectures and determining which ideas can deliver meaningful performance gains in real hardware.
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The pay range below is for all roles at this level across all US locations and functions. Paywithin this range varies by work locationand may also depend on job-related knowledge, skills,and experience. We also offer incentive opportunities that reward employees based on individual and company performance. This is in addition to our diverse package of benefits centered around the wellbeing of our employees and their loved ones. In addition to the usual Medical/Dental/Vision/401k, our inclusive rewards plan empowers our people to care for their whole selves. An investment in your future is an investment in ours.
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