Senior Emulation & FPGA Prototyping Engineer

Blue Origin

Van Horn (TX)

On-site

USD 190,000 - 320,000

Full time

8 days ago

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Benefits offered by this job

Medical, dental, vision

401(k) with match

Stock options

Education support program

Parental leave

Job summary

Blue Origin’s Emerging Systems group is hiring senior engineers to define the pre-silicon emulation and FPGA prototyping platform for the next-generation TeraWave digital system. You will own end-to-end build flows, from partitioning and synthesis to timing closure, and you’ll evaluate commercial tools and custom boards, aligning with RF/antenna teams for lab integration.

Strong RTL (SystemVerilog/Verilog), FPGA prototyping, and scripting skills (Tcl/Python) are required, as you help shape a

Qualifications

>> BS+10, MS+8, or PhD+6 years in Electrical Engineering, Computer Engineering, or a related field, or equivalent experience.
> Hands-on experience with FPGA implementation tools and flows (synthesis, constraints, place and route, timing closure)andwith commercial emulation platforms.
> Strong hands-on RTL skills in SystemVerilog or Verilog, including the ability to read, modify, and debug production RTL you did not author.
> Experience defining and deploying FPGA prototyping or emulation flows, including build automation and release management.
> Experience bringing up large digital designs on FPGA or emulation platforms.
> Proficiency in Tcl, Python, or similar scripting for build automation, flow development, and CI integration.
> Experience with lab and board-level bring-up and debug, using on-chip probes, waveform capture, and lab instrumentation.
> Experience supporting internal users of a shared platform or flow, including triage, documentation, and direct technical support.
> Ability to work effectively across cross-site, multidisciplinary engineering teams.

Responsibilities

> Define the platform strategy and build the pre-silicon emulation and prototyping capability from the ground up.
> Develop platform strategy, flows, and infrastructure, and lead tradeoff studies covering capacity, build turnaround, debug visibility, and cost.
> Evaluate and recommend platform choices, including emulation/prototyping systems and off-the-shelf boards.
> Own end-to-end build flow: partitioning, synthesis, constraints, implementation, and timing closure for large designs.
> Adapt designs for the platform with clock/reset restructuring and memory model substitution.
> Define rate-reduction strategy for DSP/beamforming prototyping and fidelity criteria for scaled designs.
> Build hardware-in-the-loop platforms connecting DSP/beamforming datapaths to real hardware.
> Establish a nightly image service with versioning, release notes, and rollback.
> Develop transactors, speed bridges, host software, and test harnesses connecting to models and hardware.
> Manage platform capacity, scheduling, and forecast future needs.
> Debug at platform level and triage failures with teams to isolate root cause.
> Partner with RF/antenna/DSP teams on lab integration and validation.
> Produce user documentation and onboarding materials.