Senior Emulation Engineer — AI/ML Prototyping & FPGA

Samsung Semiconductor Inc.; San Jose (CA); On-site; USD 138,000 - 206,000; Full time

Benefits offered by this job

Health insurance

401(k)

Paid time off

Flexible work environment

Job summary

Samsung Semiconductor, Inc. in San Jose is seeking an experienced hardware engineer to lead pre-silicon verification, large-scale emulation, and FPGA prototyping for memory-centric SoCs.

You will partition multi-million-gate designs, develop transactors, and enable early firmware bring-up with robust debugging infrastructure. You will work with Cadence/Synopsys/Siemens platforms, optimize for performance, and run AI/ML workloads pre-silicon to validate system-level behavior.

Qualifications

• 5+ years in pre-silicon verification, validation, and SoC bring-up.
• 5+ years in FPGA prototyping and large-scale hardware emulation of ASIC/SoC designs.
• Hands-on with major emulation platforms and multi-FPGA partitioning.
• Proficient in Verilog/SystemVerilog and memory modeling for emulation.
• Scripting experience (Tcl/Python) for flow automation; AI tools helpful.

Responsibilities

• Build and maintain large-scale hardware emulation and FPGA prototyping platforms.
• Partition multi-million-gate designs onto emulation systems and multi-FPGA prototypes.
• Develop transactors, speed bridges, and co-emulation environments.
• Model memory subsystems, clocks, resets, and high-speed I/O for emulation.
• Enable early firmware bring-up with stable targets and debug infrastructure.
• Run AI/ML workloads pre-silicon to validate function and performance.
• Debug complex issues with waveform capture, assertions, and root-cause analysis.
• Trade off emulation vs. prototyping for capacity, speed, and bring-up time.
• Automate flows (compile, partition, build) using scripting and AI tools.
• Communicate with users, partners, and management to deliver on time.

Skills

Pre-silicon verification

SoC bring-up

FPGA prototyping

Hardware emulation

Cadence Palladium

Synopsys ZeBu

Siemens Veloce

Synopsys HAPS

Cadence Protium

SCE-MI / co-emulation

Verilog/SystemVerilog

Tcl/Python scripting

AI/ML workloads

Communication skills

Team collaboration

Adaptability

Education

Bachelor's degree or higher

Tools

Cadence Palladium

Synopsys ZeBu

Siemens Veloce

Synopsys HAPS

Cadence Protium

PCIe / DDR / AXI interfaces

Job description

Samsung Semiconductor, Inc. in San Jose is seeking an experienced hardware engineer to lead pre-silicon verification, large-scale emulation, and FPGA prototyping for memory-centric SoCs.

You will partition multi-million-gate designs, develop transactors, and enable early firmware bring-up with robust debugging infrastructure. You will work with Cadence/Synopsys/Siemens platforms, optimize for performance, and run AI/ML workloads pre-silicon to validate system-level behavior.