Senior Emulation Engineer

ScaleFlux; Milpitas (CA); On-site; USD 120,000 - 160,000; Full time

Job summary

A leading technology company is seeking a Senior emulation engineer to enhance their engineering team in Milpitas. The ideal candidate will have a strong background in ASIC/FPGA verification, advanced programming skills, and experience with cutting-edge emulation methodologies. This role demands a results-driven engineer who thrives in a dynamic environment, providing an opportunity to influence the next generation of enterprise data center solutions.

Qualifications

• BSEE with 7+ years or MSEE with 5+ years experience required.
• Advanced knowledge of ASIC / FPGA verification flows desired.
• Team player with excellent communication skills.

Responsibilities

• Support emulation environments using latest techniques.
• Port ASIC / IP RTL to emulation platform.
• Collaborate with design and software teams.

Skills

C / C++

System Verilog

Verilog

Perl

Python

ASIC / FPGA verification

Communication skills

Education

BSEE

MSEE

Job description

We are looking for Senior emulation engineers to join our rapidly growing engineering team focused on breakthrough cloud and data center infrastructure solutions involving both storage and computing.

The ideal candidate for this role shares our passion for creating innovative technologies, and thrives in a highly dynamic, fast-paced, results-driven environment. We are looking for highly talented, passionate, and versatile engineers that can create next generation enterprise data center solutions.

Responsibilities

• Support emulation environments using the latest emulation techniques (C / C++ DPI Transactors, SV assertions, Coverage, Power Estimation, Accelerated UVM Testbenches)
• Port ASIC / IP RTL to emulation platform and automate design compile environment
• Bring up SoC on emulation, root causing SoC / Processor test fails and emulator environment issues
• Assist debug of failures by providing instrumented model ( Waveform Dumps, in circuit debug) and interfacing with stakeholder
• Setup regression and debug / triage failures on emulation platform
• Collaborate with Design, DV, Power, Silicon Validation, Performance, and Software teams.
• Work with leading emulation vendors to debug issues

Requirements

• BSEE with 7+ years or MSEE with 5+ years experience
• Advanced knowledge of standard ASIC / FPGA verification flows including simulation, testbench development, and post silicon bring-up and validation
• Excellent knowledge of System Verilog and Verilog
• Good knowledge with C / C++
• Experience with either Perl or Python scripts
• Experience with emulation methodologies, including in-circuit emulation, hybrid systems, or simulation acceleration (DPI and Transactor)
• Knowledge of industry high speed interface standard protocols (PCI Express, DDR, NAND Flash etc.) strongly desired
• Experience in computer storage or networking is desired
• Should be a team player with excellent communication skills and the desire to take on diverse challenges

Job Location : Milpitas

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Senior Engineer • Milpitas, CA, United States