Senior EDA Tools Engineer — Cadence System Capture

NVIDIA Corporation; Santa Clara (CA); On-site; USD 168,000 - 311,000; Full time

Job summary

NVIDIA Corporation in Santa Clara is seeking an experienced EDA software engineer to join an agile, multi-functional team focused on PCB design, physical layout, and SI tools. You will translate design community requirements into innovative solutions and contribute to tool improvements.

Required are a BS in CS/CE/EE or related field and 8+ years of experience, Cadence SKILL, Cadence System Capture/ SPB Allegro layouts, and proficiency in Python and TCL.

Qualifications

• BS CS/CE/EE or related field or equivalent experience.
• 8+ years of relevant work experience.
• Proven history of delivering EDA / ECAD around Cadence System Capture and SPB Allegro Layout.
• Cadence SKILL or other CAD-level programming experience.
• System design and hierarchical sub-design.
• Familiarity with automation within Windows/Linux.
• Experience with databases (Oracle/MySQL/MongoDB).
• Proficiency in Python and TCL.
• Good communication and documentation skills.

Responsibilities

• Become a member of an Agile and multi-functional EDA software development team.
• Participates in the development of tools that enable PCB electrical design, physical layout, and SI capabilities.
• Lead in assessing requirements from the design community and build innovative solutions that continually improve tools and processes.

Skills

Python

TCL

Cadence SKILL

CAD-level programming

Databases

Education

BS CS/CE/EE or related field

Tools

Cadence System Capture

SPB Allegro Layout

JIRA

Confluence

Git

CI

Perforce

Job description

NVIDIA Corporation in Santa Clara is seeking an experienced EDA software engineer to join an agile, multi-functional team focused on PCB design, physical layout, and SI tools. You will translate design community requirements into innovative solutions and contribute to tool improvements.

Required are a BS in CS/CE/EE or related field and 8+ years of experience, Cadence SKILL, Cadence System Capture/ SPB Allegro layouts, and proficiency in Python and TCL.