Senior DSP/ASIC Architect — High-Speed PHY & Algorithms

Actalent; Broomfield (CO); On-site; USD 100,000 - 200,000; Full time

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Job summary

Actalent is seeking a DSP Engineer in Broomfield, CO to define communication architectures for high-performance ASICs and develop advanced DSP algorithms. The role focuses on PHY development and system modeling rather than FPGA or embedded software.

The successful candidate will craft bit-accurate models, run simulations, and collaborate with ASIC verification teams to ensure RTL traces match models. A strong background in DSP and high-speed communication is essential.

Qualifications

• Bachelor's degree with 8+ years, Masters 6+ years, or PhD with 3+ years of relevant industry experience.
• Masters or PhD in Electrical Engineering or closely related discipline preferred.
• Deep expertise in digital communication systems, including high-speed and wireline architectures.
• Deep expertise in DSP theory and practical implementation.
• Strong experience in PHY architecture and PHY layer development.

Responsibilities

• Define end-to-end communication system architectures for high-performance ASIC-based products.
• Design and develop DSP algorithms for digital communication systems and PHY implementations.
• Create bit-accurate and fixed-point system models using C and MATLAB.
• Collaborate with ASIC teams to translate models into RTL and final ASIC designs.
• Develop verification vectors and support ASIC verification activities.
• Provide expertise in Ethernet and wireline communication architectures to guide design.

Skills

DSP algorithms

C programming

MATLAB

Ethernet

ASIC development

PHY architecture

Communication systems

Education

Bachelor's degree

Master's degree

PhD

Tools

Verilog

SystemVerilog

Job description

Actalent is seeking a DSP Engineer in Broomfield, CO to define communication architectures for high-performance ASICs and develop advanced DSP algorithms. The role focuses on PHY development and system modeling rather than FPGA or embedded software.

The successful candidate will craft bit-accurate models, run simulations, and collaborate with ASIC verification teams to ensure RTL traces match models. A strong background in DSP and high-speed communication is essential.