Senior Dry-Etch Process Engineer for Advanced Packaging

Intel; Hillsboro (OR); On-site; USD 133,800 - 255,200; Full time

Job summary

Intel in Hillsboro, Oregon is seeking an experienced Plasma Etch Process Development Engineer to join our advanced packaging team. The role focuses on developing, optimizing, and implementing dry etch processes for 2.5D/3D integration and chiplet packaging.

You will design experiments (DOE), partner with equipment suppliers, and drive roadmaps to meet future manufacturing needs while improving yield and efficiency.

Qualifications

• Master or PhD in Materials Science and Engineering, Mechanical Engineering, Chemical Engineering, Electrical Engineering, Chemistry, Physics, or a related field.
• Master's degree with at least 4 years of experience, or PhD with at least 2 years of experience.
• Experience with plasma etch equipment platforms.

Responsibilities

• Develop and optimize plasma etch processes for advanced packaging applications.
• Design experiments (DOE) to characterize process windows and optimize etch performance.
• Develop and execute technology roadmaps to meet future manufacturing needs while pushing industry standards forward.
• Partner with equipment suppliers to design, test, and implement innovative process solutions.
• Monitor and optimize production efficiency, yield, and manufacturing techniques for existing products.
• Identify and implement modifications to improve equipment performance, reduce costs, and enhance production output.
• Collaborate cross-functionally to develop scalable, robust manufacturing solutions aligned with Intel's strategic objectives.

Skills

Process development

DOE

Statistical process control

Cross-functional collaboration

Leadership

Education

Master's degree

PhD

Tools

Plasma etch equipment platforms

Job description

Intel in Hillsboro, Oregon is seeking an experienced Plasma Etch Process Development Engineer to join our advanced packaging team. The role focuses on developing, optimizing, and implementing dry etch processes for 2.5D/3D integration and chiplet packaging.

You will design experiments (DOE), partner with equipment suppliers, and drive roadmaps to meet future manufacturing needs while improving yield and efficiency.