Senior Digital-RF Subsystems Engineer & Test Lead

Northrop Grumman; Baltimore (MD); On-site; USD 120,000 - 224,000; Full time

Benefits offered by this job

Health insurance

401(k) savings plan

Paid time off (PTO)

Job summary

Northrop Grumman in Baltimore, Maryland seeks experienced Digital and RF Subsystem Integration and Test Engineers and Technical Leads. You will perform digital-RF subsystem integration, design lab test environments, and develop software to automate tests while collaborating with design teams across the program lifecycle.

Candidates should have strong experience with FPGA front-ends, RF hardware, MATLAB or similar tools, Python or C++, and the ability to lead junior engineers.

Qualifications

• Must hold a Secret or Top-Secret clearance.
• Bachelor's Degree in Engineering or related discipline with 5 years of experience or Master's with 3 years (or PhD with 0 years).
• Experience using MATLAB or similar engineering analysis tools.

Responsibilities

• Integrate digital receiver/exciter hardware and lab test environments.
• Integrate new equipment and programs in a state-of-the-art facility.
• Develop software to automate test processes and data analysis.
• Troubleshoot digital and RF issues during tests of AESA systems.
• Analyze test data and identify early trends.
• Support meetings for root cause and corrective actions.
• Collaborate with design engineering for hardware, controls, and test improvements.

Skills

Digital-RF subsystem integration

System-on-chip FPGA design

Python

C++

MATLAB

Education

Bachelor's Degree in Engineering

Master's Degree in Engineering

Tools

VHDL/Verilog

Lab test equipment

Job description

Northrop Grumman in Baltimore, Maryland seeks experienced Digital and RF Subsystem Integration and Test Engineers and Technical Leads. You will perform digital-RF subsystem integration, design lab test environments, and develop software to automate tests while collaborating with design teams across the program lifecycle.

Candidates should have strong experience with FPGA front-ends, RF hardware, MATLAB or similar tools, Python or C++, and the ability to lead junior engineers.