Senior Digital Microarchitecture Engineer

Snowcap Compute

San Francisco, Northern (CA, KY)

Hybrid

USD 150,000 - 230,000

Full time

14 days+
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Benefits offered by this job

Full medical
Dental
Vision
401(k)
Relocation assistance

Job summary

Snowcap Compute is building the world’s first commercial superconducting digital computer. You will translate the architecture specification into detailed microarchitecture documents that RTL engineers can implement directly, without guessing intent.

Work with the Digital Architect and RTL teams to define pipelines, datapaths, and timing budgets, defend the spec during reviews, and ensure the implementation matches the intended design.

Qualifications

  • Track record of microarchitecture definition on production silicon.
  • Clear, unambiguous microarchitecture specifications for RTL implementation.
  • Knowledge of RTL-to-GDS flow including synthesis, place and route, STA.
  • Fluency in architecture and RTL discussions within the same week.

Responsibilities

  • Translate top-level architecture specs into detailed microarchitecture documents for RTL engineers to implement directly.
  • Define pipeline stages, datapath structures, control logic, and timing budgets for each block.
  • Own the microarchitecture-to-RTL handoff: defend the spec and revise when needed.
  • Collaborate with the Digital Architect to flag micro-level issues and ensure alignment back up the stack.
  • Possibly own design verification: unit tests and architectural validation code.
  • Set the standard for microarchitecture documentation at Snowcap.

Skills

Microarchitecture
RTL collaboration
Timing budgets
Verification

Tools

Synthesis
Place & Route
STA
GDSII

Job description

Snowcap Compute is building the world’s first commercial superconducting digital computer. You will translate the architecture specification into detailed microarchitecture documents that RTL engineers can implement directly, without guessing intent.

Work with the Digital Architect and RTL teams to define pipelines, datapaths, and timing budgets, defend the spec during reviews, and ensure the implementation matches the intended design.

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