Senior Digital Design Engineer

Astera Labs; San Jose (CA); On-site; USD 120,000 - 190,000; Full time

Benefits offered by this job

Health benefits

Job summary

Astera Labs in San Jose, CA is seeking Digital Design Engineers to contribute to front-end circuit design, RTL, and IP integration for high performance network controllers. You will work on front-end architecture, RTL coding, and integration with signaling protocols to meet stringent latency and bandwidth requirements.

Applicants should have a strong EE background with hands-on experience in PCIe, Ualink, Esun and Ethernet, plus verification, DFT, and silicon bring-up capabilities.

Qualifications

• Hands-on front-end design with RTL, simulations, and synthesis experience.
• Experience with high-speed protocols such as PCIe, Ualink, Esun, Ethernet.
• Familiarity with UVM-based design verification and DFT concepts.
• Silicon bring-up and debug experience.
• Proactive, self-motivated with strong technical communication.

Skills

Front-end design

RTL

Synthesis

IP integration

High-speed protocols

Debugging

Education

Bachelor's degree in Electrical Engineering

Master's degree in Electrical Engineering

Tools

Synopsys

Cadence

Job description

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com .

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com .

Job Description

We are looking for Digital Design Engineers with experience developing micro-architecture and implementation of the front-end circuit design, including RTL, synthesis, IP integration for high performance network controllers. The candidate is preferred to have knowledge of communication/interface protocols such as PCI-Express (Gen-3 and above), Ualink, Esun, Ethernet etc.

Basic Qualifications:

• Strong academic and technical background in electrical engineering. A Bachelor’s degree in EE is required, and a Master’s degree is preferred.
• Professional attitude with the ability to prioritize a dynamic list of multiple tasks.
• Entrepreneurial, open-mind behavior and can-do attitude.
• Authorized to work in the US and start immediately.

Required Experience:

• Hands-on, prefer knowledge of high-speed protocols like PCIe, Ualink, Esun, Ethernet, etc.
• Proven front end design skill – architecture, RTL, simulations and synthesis
• Experience with Synopsys and/or Cadence digital design tools/flows
• Knowledge of design for test (DFT)
• Familiarity with UVM based design verification
• Silicon bring-up and debug experience

Preferred Experience:

• Scripting with Python or other equivalent programming languages.
• Development/support for PCIe or Ethernet Switch products.

We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.